文件名称:VHDL
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- 上传时间:2012-11-16
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文件大小:807.71kb
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基于fpga的串口通信。串行数据收发的同步控制。-Fpga-based serial communication
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下载文件列表
VHDL/db/altsyncram_05p3.tdf
VHDL/db/altsyncram_2hq1.tdf
VHDL/db/altsyncram_ahq1.tdf
VHDL/db/altsyncram_m7p3.tdf
VHDL/db/altsyncram_u4p3.tdf
VHDL/db/altsyncram_u7p3.tdf
VHDL/db/altsyncram_v4p3.tdf
VHDL/db/cmpr_5cc.tdf
VHDL/db/cmpr_8cc.tdf
VHDL/db/cmpr_9cc.tdf
VHDL/db/cmpr_acc.tdf
VHDL/db/cntr_02j.tdf
VHDL/db/cntr_1ci.tdf
VHDL/db/cntr_2ci.tdf
VHDL/db/cntr_3ci.tdf
VHDL/db/cntr_gui.tdf
VHDL/db/cntr_rbi.tdf
VHDL/db/cntr_sbi.tdf
VHDL/db/cntr_tbi.tdf
VHDL/db/cntr_u4j.tdf
VHDL/db/cntr_u6j.tdf
VHDL/db/decode_9oa.tdf
VHDL/db/decode_rqf.tdf
VHDL/db/mux_8oc.tdf
VHDL/db/mux_9oc.tdf
VHDL/db/mux_aoc.tdf
VHDL/db/mux_ckb.tdf
VHDL/db/prev_cmp_uart.asm.qmsg
VHDL/db/prev_cmp_uart.fit.qmsg
VHDL/db/prev_cmp_uart.map.qmsg
VHDL/db/prev_cmp_uart.qmsg
VHDL/db/prev_cmp_uart.tan.qmsg
VHDL/db/uart.(0).cnf.cdb
VHDL/db/uart.(0).cnf.hdb
VHDL/db/uart.asm.qmsg
VHDL/db/uart.asm_labs.ddb
VHDL/db/uart.cbx.xml
VHDL/db/uart.cmp.bpm
VHDL/db/uart.cmp.cdb
VHDL/db/uart.cmp.ecobp
VHDL/db/uart.cmp.hdb
VHDL/db/uart.cmp.kpt
VHDL/db/uart.cmp.logdb
VHDL/db/uart.cmp.rdb
VHDL/db/uart.cmp.tdb
VHDL/db/uart.cmp0.ddb
VHDL/db/uart.cmp2.ddb
VHDL/db/uart.cmp_merge.kpt
VHDL/db/uart.db_info
VHDL/db/uart.eco.cdb
VHDL/db/uart.fit.qmsg
VHDL/db/uart.hier_info
VHDL/db/uart.hif
VHDL/db/uart.lpc.html
VHDL/db/uart.lpc.rdb
VHDL/db/uart.lpc.txt
VHDL/db/uart.map.bpm
VHDL/db/uart.map.cdb
VHDL/db/uart.map.ecobp
VHDL/db/uart.map.hdb
VHDL/db/uart.map.kpt
VHDL/db/uart.map.logdb
VHDL/db/uart.map.qmsg
VHDL/db/uart.map_bb.cdb
VHDL/db/uart.map_bb.hdb
VHDL/db/uart.map_bb.logdb
VHDL/db/uart.pre_map.cdb
VHDL/db/uart.pre_map.hdb
VHDL/db/uart.rtlv.hdb
VHDL/db/uart.rtlv_sg.cdb
VHDL/db/uart.rtlv_sg_swap.cdb
VHDL/db/uart.sgdiff.cdb
VHDL/db/uart.sgdiff.hdb
VHDL/db/uart.sld_design_entry_dsc.sci
VHDL/db/uart.syn_hier_info
VHDL/db/uart.tan.qmsg
VHDL/db/uart.tis_db_list.ddb
VHDL/db/uart.tmw_info
VHDL/db/uart_global_asgn_op.abo
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.atm
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.hdbx
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.kpt
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.logdb
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.atm
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.dfp
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.hdbx
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.kpt
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.logdb
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.rcf
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.atm
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.dpi
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.hdbx
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.kpt
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.dpi
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.hdbx
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.kpt
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
VHDL/incremental_db/README
VHDL/pin/CORE2-5SD-PERI1-SLOT1-PERI2-SLOT2.tcl
VHDL/pin/CORE2-5U-PERI1-SLOT1-PERI2-SLOT2.tcl
VHDL/pin/COREC-240U-PERI1-SLOT1-PERI2-SLOT2.tcl
VHDL/uart.asm.rpt
VHDL/uart.cdf
VHDL/uart.done
VHDL/uart.dpf
VHDL/uart.fit.rpt
VHDL/uart.fit.smsg
VHDL/uart.fit.summary
VHDL/uart.flow.rpt
VHDL/uart.jdi
VHDL/uart.map.rpt
VHDL/uart.map.summary
VHDL/uart.pin
VHDL/uart.pof
VHDL/uart.qpf
VHDL/uart.qsf
VHDL/uart.qws
VHDL/uart.sof
VHDL/uart.tan.rpt
VHDL/uart.tan.summary
VHDL/uart.vhd
VHDL/uart.vhd.bak
VHDL/uart_assignment_defaults.qdf
VHDL/incremental_db/compiled_partitions
VHDL/db
VHDL/incremental_db
VHDL/pin
VHDL
VHDL/db/altsyncram_2hq1.tdf
VHDL/db/altsyncram_ahq1.tdf
VHDL/db/altsyncram_m7p3.tdf
VHDL/db/altsyncram_u4p3.tdf
VHDL/db/altsyncram_u7p3.tdf
VHDL/db/altsyncram_v4p3.tdf
VHDL/db/cmpr_5cc.tdf
VHDL/db/cmpr_8cc.tdf
VHDL/db/cmpr_9cc.tdf
VHDL/db/cmpr_acc.tdf
VHDL/db/cntr_02j.tdf
VHDL/db/cntr_1ci.tdf
VHDL/db/cntr_2ci.tdf
VHDL/db/cntr_3ci.tdf
VHDL/db/cntr_gui.tdf
VHDL/db/cntr_rbi.tdf
VHDL/db/cntr_sbi.tdf
VHDL/db/cntr_tbi.tdf
VHDL/db/cntr_u4j.tdf
VHDL/db/cntr_u6j.tdf
VHDL/db/decode_9oa.tdf
VHDL/db/decode_rqf.tdf
VHDL/db/mux_8oc.tdf
VHDL/db/mux_9oc.tdf
VHDL/db/mux_aoc.tdf
VHDL/db/mux_ckb.tdf
VHDL/db/prev_cmp_uart.asm.qmsg
VHDL/db/prev_cmp_uart.fit.qmsg
VHDL/db/prev_cmp_uart.map.qmsg
VHDL/db/prev_cmp_uart.qmsg
VHDL/db/prev_cmp_uart.tan.qmsg
VHDL/db/uart.(0).cnf.cdb
VHDL/db/uart.(0).cnf.hdb
VHDL/db/uart.asm.qmsg
VHDL/db/uart.asm_labs.ddb
VHDL/db/uart.cbx.xml
VHDL/db/uart.cmp.bpm
VHDL/db/uart.cmp.cdb
VHDL/db/uart.cmp.ecobp
VHDL/db/uart.cmp.hdb
VHDL/db/uart.cmp.kpt
VHDL/db/uart.cmp.logdb
VHDL/db/uart.cmp.rdb
VHDL/db/uart.cmp.tdb
VHDL/db/uart.cmp0.ddb
VHDL/db/uart.cmp2.ddb
VHDL/db/uart.cmp_merge.kpt
VHDL/db/uart.db_info
VHDL/db/uart.eco.cdb
VHDL/db/uart.fit.qmsg
VHDL/db/uart.hier_info
VHDL/db/uart.hif
VHDL/db/uart.lpc.html
VHDL/db/uart.lpc.rdb
VHDL/db/uart.lpc.txt
VHDL/db/uart.map.bpm
VHDL/db/uart.map.cdb
VHDL/db/uart.map.ecobp
VHDL/db/uart.map.hdb
VHDL/db/uart.map.kpt
VHDL/db/uart.map.logdb
VHDL/db/uart.map.qmsg
VHDL/db/uart.map_bb.cdb
VHDL/db/uart.map_bb.hdb
VHDL/db/uart.map_bb.logdb
VHDL/db/uart.pre_map.cdb
VHDL/db/uart.pre_map.hdb
VHDL/db/uart.rtlv.hdb
VHDL/db/uart.rtlv_sg.cdb
VHDL/db/uart.rtlv_sg_swap.cdb
VHDL/db/uart.sgdiff.cdb
VHDL/db/uart.sgdiff.hdb
VHDL/db/uart.sld_design_entry_dsc.sci
VHDL/db/uart.syn_hier_info
VHDL/db/uart.tan.qmsg
VHDL/db/uart.tis_db_list.ddb
VHDL/db/uart.tmw_info
VHDL/db/uart_global_asgn_op.abo
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.atm
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.hdbx
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.kpt
VHDL/incremental_db/compiled_partitions/uart.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.logdb
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.atm
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.dfp
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.hdbx
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.kpt
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.logdb
VHDL/incremental_db/compiled_partitions/uart.root_partition.cmp.rcf
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.atm
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.dpi
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.hdbx
VHDL/incremental_db/compiled_partitions/uart.root_partition.map.kpt
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.dpi
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.hdbx
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.kpt
VHDL/incremental_db/compiled_partitions/uart.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
VHDL/incremental_db/README
VHDL/pin/CORE2-5SD-PERI1-SLOT1-PERI2-SLOT2.tcl
VHDL/pin/CORE2-5U-PERI1-SLOT1-PERI2-SLOT2.tcl
VHDL/pin/COREC-240U-PERI1-SLOT1-PERI2-SLOT2.tcl
VHDL/uart.asm.rpt
VHDL/uart.cdf
VHDL/uart.done
VHDL/uart.dpf
VHDL/uart.fit.rpt
VHDL/uart.fit.smsg
VHDL/uart.fit.summary
VHDL/uart.flow.rpt
VHDL/uart.jdi
VHDL/uart.map.rpt
VHDL/uart.map.summary
VHDL/uart.pin
VHDL/uart.pof
VHDL/uart.qpf
VHDL/uart.qsf
VHDL/uart.qws
VHDL/uart.sof
VHDL/uart.tan.rpt
VHDL/uart.tan.summary
VHDL/uart.vhd
VHDL/uart.vhd.bak
VHDL/uart_assignment_defaults.qdf
VHDL/incremental_db/compiled_partitions
VHDL/db
VHDL/incremental_db
VHDL/pin
VHDL
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