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文件名称:fpga_pc

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    682.18kb
  • 已下载：
    0次
  • 提 供 者：
    tan****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

该源码实现了XILINX的FPGA(Spartan 3E)与计算机的通信，用到了rs232串口、ps/2键盘接口、lcd液晶，是学习FPGA很好的资料-The source implementation of the XILINX' s FPGA (Spartan 3E) and computer communications, use the rs232 serial port, ps/2 keyboard interface, lcd LCD is good information to learn FPGA
相关搜索： spartan 3e lcd keyboard

(系统自动生成,下载前可以参看下载内容)

下载文件列表

fpga_pc/fpga_pc_ngdbuild.xrpt
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData_StrTbl
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main_StrTbl
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/NameMap
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/NameMap_StrTbl
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_objects__
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_objects___StrTbl
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_object_table__
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject_StrTbl
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/__stored_object_table__
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/Autonym/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/HDProject/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/ProjectNavigator/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/ProjectNavigatorGui/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/xst/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/ngdbuild/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/map/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/par/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/trce/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/bitgen/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/SrcCtrl/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/WebTalk/DesignDataCollection/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/WebTalk/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/_ProjRepoInternal_/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/common/regkeys
fpga_pc/fpga_pc_xdb/tmp/ise/version
fpga_pc/fpga_pc_xdb/tmp/ise.lock
fpga_pc/fpga_pc_xdb/cst.xbcd
fpga_pc/fpga_pc.ngd
fpga_pc/fpga_pc_prev_built.ngd
fpga_pc/_xmsgs/xst.xmsgs
fpga_pc/_xmsgs/ngdbuild.xmsgs
fpga_pc/_xmsgs/map.xmsgs
fpga_pc/_xmsgs/par.xmsgs
fpga_pc/_xmsgs/trce.xmsgs
fpga_pc/_xmsgs/bitgen.xmsgs
fpga_pc/fpga_pc.ise
fpga_pc/fpga_pc.restore
fpga_pc/fpga_pc_map.mrp
fpga_pc/fpga_pc.v
fpga_pc/fpga_pc_map.map
fpga_pc/fpga_pc.pcf
fpga_pc/ps2scan.v
fpga_pc/fpga_pc_map.ngm
fpga_pc/fpga_pc.par
fpga_pc/speed_select.v
fpga_pc/fpga_pc_map.ncd
fpga_pc/fpga_pc.ncd
fpga_pc/.lso
fpga_pc/fpga_pc_usage.xml
fpga_pc/fpga_pc_summary.xml
fpga_pc/fpga_pc_map.xrpt
fpga_pc/fpga_pc_par.xrpt
fpga_pc/fpga_pc.xpi
fpga_pc/fpga_pc.prj
fpga_pc/xst/work/vlg20/speed__select.bin
fpga_pc/xst/work/vlg76/ps2scan.bin
fpga_pc/xst/work/vlg38/my__uart__tx.bin
fpga_pc/xst/work/vlg74/fpga__pc.bin
fpga_pc/xst/work/hdllib.ref
fpga_pc/xst/work/vlg5F/lcd.bin
fpga_pc/xst/work/vlg21/uart__rx.bin
fpga_pc/xst/work/vlg2B/uart__tx.bin
fpga_pc/xst/dump.xst/fpga_pc.prj/ntrc.scr
fpga_pc/fpga_pc.xst
fpga_pc/fpga_pc.pad
fpga_pc/fpga_pc.stx
fpga_pc/fpga_pc.ptwx
fpga_pc/fpga_pc.bld
fpga_pc/fpga_pc_pad.csv
fpga_pc/fpga_pc.twx
fpga_pc/fpga_pc.twr
fpga_pc/fpga_pc.bgn
fpga_pc/fpga_pc.ucf
fpga_pc/fpga_pc.ut
fpga_pc/fpga_pc.lfp
fpga_pc/_pace.ucf
fpga_pc/fpga_pc_pad.txt
fpga_pc/fpga_pc.unroutes
fpga_pc/fpga_pc.cmd_log
fpga_pc/fpga_pc_guide.ncd
fpga_pc/fpga_pc.drc
fpga_pc/fpga_pc.bit
fpga_pc/fpga_pc.syr
fpga_pc/_impact.cmd
fpga_pc/device_usage_statistics.html
fpga_pc/fpga_pc_summary.html
fpga_pc/lcd.v
fpga_pc/fpga_pc_xst.xrpt
fpga_pc/_impact.log
fpga_pc/fpga_pc.lso
fpga_pc/fpga_pc.ntrc_log
fpga_pc/fpga_pc.ngr
fpga_pc/fpga_pc.ngc
fpga_pc/test.txt
fpga_pc/uart_rx.v
fpga_pc/uart_tx.v
fpga_pc/templates/coregen.xml
fpga_pc/_ngo/netlist.lst
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/SrcCtrl/SavedOptions
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/HDProject
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/xst
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/ngdbuild
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/map
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/par
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/trce
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/STE/bitgen
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/WebTalk/DesignDataCollection
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/Autonym
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/STE
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/SrcCtrl
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/WebTalk
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/_ProjRepoInternal_
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/common
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator
fpga_pc/fpga_pc_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign
fpga_pc/fpga_pc_xdb/tmp/ise/__REGISTRY__/Autonym
fpga_pc/fpga_pc_xdb/tmp/ise/_

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