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文件名称:simple_fm_receiver_latest.tar

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    2012-11-16
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    1.51mb
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用FPGA实现简单的FM接收机,d/a模块用扬声器-FPGA implementation using a simple FM receiver, d/a module with speaker
相关搜索: VHDL 接收机 接收机

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下载文件列表

simple_fm_receiver/
simple_fm_receiver/tags/
simple_fm_receiver/tags/version_1_1/
simple_fm_receiver/tags/version_1_1/docs/
simple_fm_receiver/tags/version_1_1/docs/phase_detector.eps
simple_fm_receiver/tags/version_1_1/docs/acrobat_view
simple_fm_receiver/tags/version_1_1/docs/simple_fm_receiver.tex
simple_fm_receiver/tags/version_1_1/docs/fm_receiver.eps
simple_fm_receiver/tags/version_1_1/docs/nco.eps
simple_fm_receiver/tags/version_1_1/docs/screenshot.eps
simple_fm_receiver/tags/version_1_1/docs/simple_fm_receiver.pdf
simple_fm_receiver/tags/version_1_1/docs/loop_filter.eps
simple_fm_receiver/tags/version_1_1/docs/fm_cores.eps
simple_fm_receiver/tags/version_1_1/docs/fm.eps
simple_fm_receiver/tags/version_1_1/docs/Makefile
simple_fm_receiver/tags/version_1_1/export/
simple_fm_receiver/tags/version_1_1/export/verilog/
simple_fm_receiver/tags/version_1_1/export/verilog/Makefile
simple_fm_receiver/tags/version_1_1/export/vhd/
simple_fm_receiver/tags/version_1_1/export/vhd/Makefile
simple_fm_receiver/tags/version_1_1/script/
simple_fm_receiver/tags/version_1_1/script/cos.txt
simple_fm_receiver/tags/version_1_1/script/script.sh
simple_fm_receiver/tags/version_1_1/fpga_bit_files/
simple_fm_receiver/tags/version_1_1/fpga_bit_files/xilinx_fpga-20050312.bit
simple_fm_receiver/tags/version_1_1/fpga_bit_files/screenshot-20050323.png
simple_fm_receiver/tags/version_1_1/fpga_bit_files/README
simple_fm_receiver/tags/version_1_1/fpga_bit_files/xilinx_fpga-20050110.bit
simple_fm_receiver/tags/version_1_1/README
simple_fm_receiver/tags/version_1_1/modelsim-bench/
simple_fm_receiver/tags/version_1_1/modelsim-bench/chipscope_modelsim_view.vhdl
simple_fm_receiver/tags/version_1_1/modelsim-bench/input.vhdl
simple_fm_receiver/tags/version_1_1/modelsim-bench/fm.txt
simple_fm_receiver/tags/version_1_1/modelsim-bench/bench.vhdl
simple_fm_receiver/tags/version_1_1/modelsim-bench/fmTri.txt
simple_fm_receiver/tags/version_1_1/modelsim-bench/Makefile
simple_fm_receiver/tags/version_1_1/source/
simple_fm_receiver/tags/version_1_1/source/adder_13bit.vhdl
simple_fm_receiver/tags/version_1_1/source/fm.vhdl
simple_fm_receiver/tags/version_1_1/source/modelsim_v.do
simple_fm_receiver/tags/version_1_1/source/adder_14bit.vhdl
simple_fm_receiver/tags/version_1_1/source/mult_8bit.vhdl
simple_fm_receiver/tags/version_1_1/source/adder_18bit.vhdl
simple_fm_receiver/tags/version_1_1/source/adder_15bit.vhdl
simple_fm_receiver/tags/version_1_1/source/modelsim_xil.do
simple_fm_receiver/tags/version_1_1/source/adder_12bit.vhdl
simple_fm_receiver/tags/version_1_1/source/fulladder.vhdl
simple_fm_receiver/tags/version_1_1/source/Makefile.alliance
simple_fm_receiver/tags/version_1_1/source/loop_filter.vhdl
simple_fm_receiver/tags/version_1_1/source/adder_11bit.vhdl
simple_fm_receiver/tags/version_1_1/source/rom.vhdl
simple_fm_receiver/tags/version_1_1/source/modelsim_vhd.do
simple_fm_receiver/tags/version_1_1/source/phase_detector.vhdl
simple_fm_receiver/tags/version_1_1/source/addacc.vhdl
simple_fm_receiver/tags/version_1_1/source/sub_12bit.vhdl
simple_fm_receiver/tags/version_1_1/source/adder_10bit.vhdl
simple_fm_receiver/tags/version_1_1/source/adder_16bit_u.vhdl
simple_fm_receiver/tags/version_1_1/source/modelsim.do
simple_fm_receiver/tags/version_1_1/source/adder_16bit.vhdl
simple_fm_receiver/tags/version_1_1/source/nco.vhdl
simple_fm_receiver/tags/version_1_1/source/fir.vhdl
simple_fm_receiver/tags/version_1_1/source/adder_09bit.vhdl
simple_fm_receiver/tags/version_1_1/source/Makefile
simple_fm_receiver/tags/version_1_1/bench_xil/
simple_fm_receiver/tags/version_1_1/bench_xil/input_fm_xil.vhdl
simple_fm_receiver/tags/version_1_1/bench_xil/bench_xil.vhdl
simple_fm_receiver/tags/version_1_1/TODO
simple_fm_receiver/tags/version_1_1/bench/
simple_fm_receiver/tags/version_1_1/bench/xilinx_fpga.ucf
simple_fm_receiver/tags/version_1_1/bench/input_fm.vhdl
simple_fm_receiver/tags/version_1_1/bench/xilinx_fpga.vhdl
simple_fm_receiver/tags/version_1_1/bench/bench.vhdl
simple_fm_receiver/tags/version_1_1/bench/Makefile
simple_fm_receiver/tags/version_1_1/Makefile
simple_fm_receiver/tags/VSFR_1/
simple_fm_receiver/tags/VSFR_1/docs/
simple_fm_receiver/tags/VSFR_1/docs/Makefile
simple_fm_receiver/tags/VSFR_1/export/
simple_fm_receiver/tags/VSFR_1/export/verilog/
simple_fm_receiver/tags/VSFR_1/export/verilog/Makefile
simple_fm_receiver/tags/VSFR_1/export/vhd/
simple_fm_receiver/tags/VSFR_1/export/vhd/Makefile
simple_fm_receiver/tags/VSFR_1/README
simple_fm_receiver/tags/VSFR_1/modelsim-bench/
simple_fm_receiver/tags/VSFR_1/modelsim-bench/input.vhdl
simple_fm_receiver/tags/VSFR_1/modelsim-bench/fm.txt
simple_fm_receiver/tags/VSFR_1/modelsim-bench/bench.vhdl
simple_fm_receiver/tags/VSFR_1/modelsim-bench/fmTri.txt
simple_fm_receiver/tags/VSFR_1/modelsim-bench/bench.v
simple_fm_receiver/tags/VSFR_1/modelsim-bench/Makefile
simple_fm_receiver/tags/VSFR_1/modelsim-bench/input_fm.v
simple_fm_receiver/tags/VSFR_1/source/
simple_fm_receiver/tags/VSFR_1/source/adder_13bit.vhdl
simple_fm_receiver/tags/VSFR_1/source/fm.vhdl
simple_fm_receiver/tags/VSFR_1/source/modelsim_v.do
simple_fm_receiver/

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