CI/ci_comp.asm.rpt
CI/ci_comp.done
CI/ci_comp.fit.eqn
CI/ci_comp.fit.rpt
CI/ci_comp.fit.summary
CI/ci_comp.flow.rpt
CI/ci_comp.map.eqn
CI/ci_comp.map.rpt
CI/ci_comp.map.summary
CI/ci_comp.pin
CI/ci_comp.pof
CI/ci_comp.qpf
CI/ci_comp.qsf
CI/ci_comp.qws
CI/ci_comp.sim.rpt
CI/ci_comp.sof
CI/ci_comp.tan.rpt
CI/ci_comp.tan.summary
CI/ci_comp.vhd
CI/ci_comp.vwf
CI/ci_comp_wave0.jpg
CI/ci_comp_waveforms.html
CI/cmp_state.ini
CI/db/ci_comp.(0).cnf.cdb
CI/db/ci_comp.(0).cnf.hdb
CI/db/ci_comp.(1).cnf.cdb
CI/db/ci_comp.(1).cnf.hdb
CI/db/ci_comp.(10).cnf.cdb
CI/db/ci_comp.(10).cnf.hdb
CI/db/ci_comp.(11).cnf.cdb
CI/db/ci_comp.(11).cnf.hdb
CI/db/ci_comp.(2).cnf.cdb
CI/db/ci_comp.(2).cnf.hdb
CI/db/ci_comp.(3).cnf.cdb
CI/db/ci_comp.(3).cnf.hdb
CI/db/ci_comp.(4).cnf.cdb
CI/db/ci_comp.(4).cnf.hdb
CI/db/ci_comp.(5).cnf.cdb
CI/db/ci_comp.(5).cnf.hdb
CI/db/ci_comp.(6).cnf.cdb
CI/db/ci_comp.(6).cnf.hdb
CI/db/ci_comp.(7).cnf.cdb
CI/db/ci_comp.(7).cnf.hdb
CI/db/ci_comp.(8).cnf.cdb
CI/db/ci_comp.(8).cnf.hdb
CI/db/ci_comp.(9).cnf.cdb
CI/db/ci_comp.(9).cnf.hdb
CI/db/ci_comp.asm.qmsg
CI/db/ci_comp.cbx.xml
CI/db/ci_comp.cmp.cdb
CI/db/ci_comp.cmp.hdb
CI/db/ci_comp.cmp.rdb
CI/db/ci_comp.cmp.tdb
CI/db/ci_comp.cmp0.ddb
CI/db/ci_comp.db_info
CI/db/ci_comp.eco.cdb
CI/db/ci_comp.eds_overflow
CI/db/ci_comp.fit.qmsg
CI/db/ci_comp.hier_info
CI/db/ci_comp.hif
CI/db/ci_comp.map.cdb
CI/db/ci_comp.map.hdb
CI/db/ci_comp.map.qmsg
CI/db/ci_comp.pre_map.cdb
CI/db/ci_comp.pre_map.hdb
CI/db/ci_comp.psp
CI/db/ci_comp.rtlv.hdb
CI/db/ci_comp.rtlv_sg.cdb
CI/db/ci_comp.rtlv_sg_swap.cdb
CI/db/ci_comp.sgdiff.cdb
CI/db/ci_comp.sgdiff.hdb
CI/db/ci_comp.signalprobe.cdb
CI/db/ci_comp.sim.hdb
CI/db/ci_comp.sim.qmsg
CI/db/ci_comp.sim.rdb
CI/db/ci_comp.sim.vwf
CI/db/ci_comp.sld_design_entry.sci
CI/db/ci_comp.sld_design_entry_dsc.sci
CI/db/ci_comp.syn_hier_info
CI/db/ci_comp.tan.qmsg
CI/db/ci_comp_cmp.qrpt
CI/db/ci_comp_sim.qrpt
CI/DeviceSOPC_StandardCore/cmp_state.ini
CI/DeviceSOPC_StandardCore/component_builder_logfile.txt
CI/DeviceSOPC_StandardCore/cpu_0.ocp
CI/DeviceSOPC_StandardCore/cpu_0.v
CI/DeviceSOPC_StandardCore/cpu_0_jtag_debug_module.v
CI/DeviceSOPC_StandardCore/cpu_0_jtag_debug_module_wrapper.v
CI/DeviceSOPC_StandardCore/cpu_0_mult_cell.v
CI/DeviceSOPC_StandardCore/cpu_0_ociram_default_contents.mif
CI/DeviceSOPC_StandardCore/cpu_0_test_bench.v
CI/DeviceSOPC_StandardCore/delay_reset_block.bdf
CI/DeviceSOPC_StandardCore/delay_reset_block.bsf
CI/DeviceSOPC_StandardCore/DM9000_IRQ.v
CI/DeviceSOPC_StandardCore/DM9000_RST.v
CI/DeviceSOPC_StandardCore/dma.v
CI/DeviceSOPC_StandardCore/epcs_controller.v
CI/DeviceSOPC_StandardCore/epcs_controller_boot_rom.hex
CI/DeviceSOPC_StandardCore/high_res_timer.v
CI/DeviceSOPC_StandardCore/i2c_master.v
CI/DeviceSOPC_StandardCore/i2c_master_bit_ctrl.vhd
CI/DeviceSOPC_StandardCore/i2c_master_byte_ctrl.vhd
CI/DeviceSOPC_StandardCore/i2c_master_top.vhd
CI/DeviceSOPC_StandardCore/ic_tag_ram.mif
CI/DeviceSOPC_StandardCore/jtag_uart.v
CI/DeviceSOPC_StandardCore/key_pio.v
CI/DeviceSOPC_StandardCore/led.v
CI/DeviceSOPC_StandardCore/led_pio.v
CI/DeviceSOPC_StandardCore/oc_i2c_master.vhd
CI/DeviceSOPC_StandardCore/onchip_ram.hex
CI/DeviceSOPC_StandardCore/onchip_ram.v
CI/DeviceSOPC_StandardCore/opencores_i2c_master.v
CI/DeviceSOPC_StandardCore/p0_2_p0_3.v
CI/DeviceSOPC_StandardCore/p0_7_p0_30.v
CI/DeviceSOPC_StandardCore/p1_16_p1_25.v
CI/DeviceSOPC_StandardCore/p2_16_p2_31.v
CI/DeviceSOPC_StandardCore/PLL.bsf
CI/DeviceSOPC_StandardCore/PLL.v
CI/DeviceSOPC_StandardCore/reset_counter.bsf
CI/DeviceSOPC_StandardCore/reset_counter.v
CI/DeviceSOPC_StandardCore/rf_ram_a.mif
CI/DeviceSOPC_StandardCore/rf_ram_b.mif
CI/DeviceSOPC_StandardCore/SCL.v
CI/DeviceSOPC_StandardCore/SDA.v
CI/DeviceSOPC_StandardCore/sdram.v
CI/DeviceSOPC_StandardCore/sdram_test_component.v
CI/DeviceSOPC_StandardCore/serv_req_info.txt
CI/DeviceSOPC_StandardCore/sopc_builder_debug_log.txt
CI/DeviceSOPC_StandardCore/spi.v
CI/DeviceSOPC_StandardCore/standard.asm.rpt
CI/DeviceSOPC_StandardCore/standard.bdf
CI/DeviceSOPC_StandardCore/standard.cdf
CI/DeviceSOPC_StandardCore/standard.done
CI/DeviceSOPC_StandardCore/standard.fit.eqn
CI/DeviceSOPC_StandardCore/standard.fit.rpt
CI/DeviceSOPC_StandardCore/standard.fit.summary
CI/DeviceSOPC_StandardCore/standard.fld
CI/DeviceSOPC_StandardCore/standard.flow.rpt
CI/DeviceSOPC_StandardCore/standard.jic
CI/DeviceSOPC_StandardCore/standard.map.eqn
CI/DeviceSOPC_StandardCore/standard.map.rpt
CI/DeviceSOPC_StandardCore/standard.map.summary
CI/DeviceSOPC_StandardCore/standard.merge.rpt
CI/DeviceSOPC_StandardCore/standard.pin
CI/DeviceSOPC_StandardCore/standard.pof
CI/DeviceSOPC_StandardCore/standard.ppl
CI/DeviceSOPC_StandardCore/standard.qpf
CI/DeviceSOPC_StandardCore/standard.qsf
CI/DeviceSOPC_StandardCore/standard.qws
CI/DeviceSOPC_StandardCore/standard.rbf
CI/DeviceSOPC_StandardCore/standard.sld_hub_inst.map.eqn
CI/DeviceSOPC_StandardCore/standard.sof
CI/DeviceSOPC_StandardCore/standard.tan.rpt
CI/DeviceSOPC_StandardCore/standard.tan.summary
CI/DeviceSOPC_StandardCore/standard_1c6.bsf
CI/DeviceSOPC_StandardCore/standard_1c6.ptf
CI/DeviceSOPC_StandardCore/sta