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文件名称:SHT1X

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [PDF]
  • 上传时间：
    2012-11-16
  • 文件大小：
    8.24mb
  • 已下载：
    0次
  • 提 供 者：
    x*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

SHT源码,和大家共享下,希望大家能学到东西-The SHT source, and share, I hope you learn something
(系统自动生成,下载前可以参看下载内容)

下载文件列表

SHT1X/.compxlib.cfg
SHT1X/.cxl.mti_se.version
SHT1X/codelog/v1_0.v
SHT1X/codelog/v1_1.v
SHT1X/codelog/v1_2.v
SHT1X/codelog/v1_3.v
SHT1X/compxlib.cfg
SHT1X/compxlib.log
SHT1X/compxlib.log.bak
SHT1X/hostlistfile.txt
SHT1X/impact.xsl
SHT1X/impact_impact.xwbt
SHT1X/ipcore_dir/coregen.cgp
SHT1X/ipcore_dir/coregen.log
SHT1X/ipcore_dir/create_DCM.tcl
SHT1X/ipcore_dir/create_DCM_Gen.tcl
SHT1X/ipcore_dir/DCM_Gen/clk_wiz_v3_2_readme.txt
SHT1X/ipcore_dir/DCM_Gen/DCM_Gen.ucf
SHT1X/ipcore_dir/DCM_Gen/DCM_Gen.xdc
SHT1X/ipcore_dir/DCM_Gen/doc/clk_wiz_ds709.pdf
SHT1X/ipcore_dir/DCM_Gen/doc/clk_wiz_gsg521.pdf
SHT1X/ipcore_dir/DCM_Gen/doc/clk_wiz_v3_2_readme.txt
SHT1X/ipcore_dir/DCM_Gen/doc/clk_wiz_v3_2_vinfo.html
SHT1X/ipcore_dir/DCM_Gen/example_design/DCM_Gen_exdes.v
SHT1X/ipcore_dir/DCM_Gen/generate/clk_wiz_v3_2_generate.tcl
SHT1X/ipcore_dir/DCM_Gen/generate/clk_wiz_v3_2_model.tcl
SHT1X/ipcore_dir/DCM_Gen/generate/run_legacy_tcl_flow.tcl
SHT1X/ipcore_dir/DCM_Gen/implement/implement.bat
SHT1X/ipcore_dir/DCM_Gen/implement/implement.sh
SHT1X/ipcore_dir/DCM_Gen/implement/planAhead_ise.bat
SHT1X/ipcore_dir/DCM_Gen/implement/planAhead_ise.sh
SHT1X/ipcore_dir/DCM_Gen/implement/planAhead_ise.tcl
SHT1X/ipcore_dir/DCM_Gen/implement/planAhead_rdn.bat
SHT1X/ipcore_dir/DCM_Gen/implement/planAhead_rdn.sh
SHT1X/ipcore_dir/DCM_Gen/implement/planAhead_rdn.tcl
SHT1X/ipcore_dir/DCM_Gen/implement/xst.prj
SHT1X/ipcore_dir/DCM_Gen/implement/xst.scr
SHT1X/ipcore_dir/DCM_Gen/simulation/DCM_Gen_tb.v
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/simcmds.tcl
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/simulate_isim.bat
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/simulate_isim.sh
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/simulate_mti.do
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/simulate_ncsim.sh
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/simulate_vcs.sh
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/ucli_commands.key
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/vcs_session.tcl
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/wave.do
SHT1X/ipcore_dir/DCM_Gen/simulation/functional/wave.sv
SHT1X/ipcore_dir/DCM_Gen/simulation/timing/DCM_Gen_tb.v
SHT1X/ipcore_dir/DCM_Gen/simulation/timing/sdf_cmd_file
SHT1X/ipcore_dir/DCM_Gen/simulation/timing/simulate_mti.do
SHT1X/ipcore_dir/DCM_Gen/simulation/timing/simulate_ncsim.sh
SHT1X/ipcore_dir/DCM_Gen/simulation/timing/wave.do
SHT1X/ipcore_dir/gen_Main_DCM.tcl
SHT1X/ipcore_dir/Main_DCM/clk_wiz_v3_2_readme.txt
SHT1X/ipcore_dir/Main_DCM/doc/clk_wiz_ds709.pdf
SHT1X/ipcore_dir/Main_DCM/doc/clk_wiz_gsg521.pdf
SHT1X/ipcore_dir/Main_DCM/doc/clk_wiz_v3_2_readme.txt
SHT1X/ipcore_dir/Main_DCM/doc/clk_wiz_v3_2_vinfo.html
SHT1X/ipcore_dir/Main_DCM/example_design/Main_DCM_exdes.v
SHT1X/ipcore_dir/Main_DCM/generate/clk_wiz_v3_2_generate.tcl
SHT1X/ipcore_dir/Main_DCM/generate/clk_wiz_v3_2_model.tcl
SHT1X/ipcore_dir/Main_DCM/generate/run_legacy_tcl_flow.tcl
SHT1X/ipcore_dir/Main_DCM/implement/implement.bat
SHT1X/ipcore_dir/Main_DCM/implement/implement.sh
SHT1X/ipcore_dir/Main_DCM/implement/planAhead_ise.bat
SHT1X/ipcore_dir/Main_DCM/implement/planAhead_ise.sh
SHT1X/ipcore_dir/Main_DCM/implement/planAhead_ise.tcl
SHT1X/ipcore_dir/Main_DCM/implement/planAhead_rdn.bat
SHT1X/ipcore_dir/Main_DCM/implement/planAhead_rdn.sh
SHT1X/ipcore_dir/Main_DCM/implement/planAhead_rdn.tcl
SHT1X/ipcore_dir/Main_DCM/implement/xst.prj
SHT1X/ipcore_dir/Main_DCM/implement/xst.scr
SHT1X/ipcore_dir/Main_DCM/Main_DCM.ucf
SHT1X/ipcore_dir/Main_DCM/Main_DCM.xdc
SHT1X/ipcore_dir/Main_DCM/simulation/functional/simcmds.tcl
SHT1X/ipcore_dir/Main_DCM/simulation/functional/simulate_isim.bat
SHT1X/ipcore_dir/Main_DCM/simulation/functional/simulate_isim.sh
SHT1X/ipcore_dir/Main_DCM/simulation/functional/simulate_mti.do
SHT1X/ipcore_dir/Main_DCM/simulation/functional/simulate_ncsim.sh
SHT1X/ipcore_dir/Main_DCM/simulation/functional/simulate_vcs.sh
SHT1X/ipcore_dir/Main_DCM/simulation/functional/ucli_commands.key
SHT1X/ipcore_dir/Main_DCM/simulation/functional/vcs_session.tcl
SHT1X/ipcore_dir/Main_DCM/simulation/functional/wave.do
SHT1X/ipcore_dir/Main_DCM/simulation/functional/wave.sv
SHT1X/ipcore_dir/Main_DCM/simulation/Main_DCM_tb.v
SHT1X/ipcore_dir/Main_DCM/simulation/timing/Main_DCM_tb.v
SHT1X/ipcore_dir/Main_DCM/simulation/timing/sdf_cmd_file
SHT1X/ipcore_dir/Main_DCM/simulation/timing/simulate_mti.do
SHT1X/ipcore_dir/Main_DCM/simulation/timing/simulate_ncsim.sh
SHT1X/ipcore_dir/Main_DCM/simulation/timing/wave.do
SHT1X/ipcore_dir/Main_DCM.asy
SHT1X/ipcore_dir/Main_DCM.ejp
SHT1X/ipcore_dir/Main_DCM.gise
SHT1X/ipcore_dir/Main_DCM.sym
SHT1X/ipcore_dir/Main_DCM.v
SHT1X/ipcore_dir/Main_DCM.veo
SHT1X/ipcore_dir/Main_DCM.xco
SHT1X/ipcore_dir/Main_DCM.xise
SHT1X/ipcore_dir/Main_DCM_exdes.ncf
SHT1X/ipcore_dir/Main_DCM_flist.txt
SHT1X/ipcore_dir/Main_DCM_xmdf.tcl
SHT1X/ipcore_dir/tmp/customization_gui.0.0272404244296.out
SHT1X/ipcore_dir/tmp/customization_gui.0.0404334226811.out
SHT1X/ipcore_dir/tmp/customization_gui.0.273834122472.out
SHT1X/ipcore_dir/tmp/customization_gui.0.408446566858.out
SHT1X/ipcore_dir/tmp/customization_gui.0.794231600498.out
SHT1X/ipcore_dir/

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