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文件名称:FPGA_TO_DSP

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  • 上传时间:
    2014-08-13
  • 文件大小:
    400.93kb
  • 已下载:
    0次
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介绍说明--下载内容来自于网络,使用问题请自行百度

DSP_FPGA 通信接口 可以实现二者之间的通信 串行信号到并行信号-DSP_FPGA communication interface may communicate between a serial signal to a parallel signal of both
(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA_TO_DSP/
FPGA_TO_DSP/DATA/
FPGA_TO_DSP/DATA/DATA.gise
FPGA_TO_DSP/DATA/DATA.v
FPGA_TO_DSP/DATA/DATA.xise
FPGA_TO_DSP/DATA/DATA_summary.html
FPGA_TO_DSP/DATA/DATA_TEST.v
FPGA_TO_DSP/DATA/Data_To_DSP.bld
FPGA_TO_DSP/DATA/Data_To_DSP.cmd_log
FPGA_TO_DSP/DATA/Data_To_DSP.lso
FPGA_TO_DSP/DATA/Data_To_DSP.ncd
FPGA_TO_DSP/DATA/Data_To_DSP.ngc
FPGA_TO_DSP/DATA/Data_To_DSP.ngd
FPGA_TO_DSP/DATA/Data_To_DSP.ngr
FPGA_TO_DSP/DATA/Data_To_DSP.pad
FPGA_TO_DSP/DATA/Data_To_DSP.par
FPGA_TO_DSP/DATA/Data_To_DSP.pcf
FPGA_TO_DSP/DATA/Data_To_DSP.prj
FPGA_TO_DSP/DATA/Data_To_DSP.ptwx
FPGA_TO_DSP/DATA/Data_To_DSP.stx
FPGA_TO_DSP/DATA/Data_To_DSP.syr
FPGA_TO_DSP/DATA/Data_To_DSP.twr
FPGA_TO_DSP/DATA/Data_To_DSP.twx
FPGA_TO_DSP/DATA/Data_To_DSP.unroutes
FPGA_TO_DSP/DATA/Data_To_DSP.xpi
FPGA_TO_DSP/DATA/Data_To_DSP.xst
FPGA_TO_DSP/DATA/Data_To_DSP_envsettings.html
FPGA_TO_DSP/DATA/Data_To_DSP_guide.ncd
FPGA_TO_DSP/DATA/Data_To_DSP_isim_beh.exe
FPGA_TO_DSP/DATA/Data_To_DSP_map.map
FPGA_TO_DSP/DATA/Data_To_DSP_map.mrp
FPGA_TO_DSP/DATA/Data_To_DSP_map.ncd
FPGA_TO_DSP/DATA/Data_To_DSP_map.ngm
FPGA_TO_DSP/DATA/Data_To_DSP_map.xrpt
FPGA_TO_DSP/DATA/Data_To_DSP_ngdbuild.xrpt
FPGA_TO_DSP/DATA/Data_To_DSP_pad.csv
FPGA_TO_DSP/DATA/Data_To_DSP_pad.txt
FPGA_TO_DSP/DATA/Data_To_DSP_par.xrpt
FPGA_TO_DSP/DATA/Data_To_DSP_stx_beh.prj
FPGA_TO_DSP/DATA/Data_To_DSP_summary.html
FPGA_TO_DSP/DATA/Data_To_DSP_summary.xml
FPGA_TO_DSP/DATA/Data_To_DSP_usage.xml
FPGA_TO_DSP/DATA/Data_To_DSP_xst.xrpt
FPGA_TO_DSP/DATA/fuse.log
FPGA_TO_DSP/DATA/fuse.xmsgs
FPGA_TO_DSP/DATA/fuseRelaunch.cmd
FPGA_TO_DSP/DATA/ipcore_dir/
FPGA_TO_DSP/DATA/iseconfig/
FPGA_TO_DSP/DATA/iseconfig/DATA.projectmgr
FPGA_TO_DSP/DATA/iseconfig/DATA.xreport
FPGA_TO_DSP/DATA/iseconfig/Data_To_DSP.xreport
FPGA_TO_DSP/DATA/isim/
FPGA_TO_DSP/DATA/isim.cmd
FPGA_TO_DSP/DATA/isim.log
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/Data_To_DSP_isim_beh.exe
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/isimcrash.log
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/isimkernel.log
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/netId.dat
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/tmp_save/
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/tmp_save/_1
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/Data_To_DSP_isim_beh.exe_main.c
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/Data_To_DSP_isim_beh.exe_main.nt.obj
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/m_00000000003416124960_2373707315.c
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/m_00000000003416124960_2373707315.didat
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/m_00000000003416124960_2373707315.nt.obj
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
FPGA_TO_DSP/DATA/isim/Data_To_DSP_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt.obj
FPGA_TO_DSP/DATA/isim/isim_usage_statistics.html
FPGA_TO_DSP/DATA/isim/pn_info
FPGA_TO_DSP/DATA/isim/temp/
FPGA_TO_DSP/DATA/isim/temp/@data_@to_@d@s@p.sdb
FPGA_TO_DSP/DATA/isim/temp/@t@e@s@t.sdb
FPGA_TO_DSP/DATA/isim/temp/glbl.sdb
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/isimcrash.log
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/isimkernel.log
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/netId.dat
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/TEST_isim_beh.exe
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/tmp_save/
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/tmp_save/_1
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000000527351923_1087167475.c
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000000527351923_1087167475.didat
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000000527351923_1087167475.nt.obj
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000003416124960_2373707315.c
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000003416124960_2373707315.didat
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000003416124960_2373707315.nt.obj
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt.obj
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/TEST_isim_beh.exe_main.c
FPGA_TO_DSP/DATA/isim/TEST_isim_beh.exe.sim/work/TEST_isim_beh.exe_main.nt.obj
FPGA_TO_DSP/DATA/isim/work/
FPGA_TO_DSP/DATA/isim/work/@data_@to_@d@s@p.sdb
FPGA_TO_DSP/DATA/isim/work/@t@e@s@t.sdb
FPGA_TO_DSP/DATA/isim/work/glbl.sdb
FPGA_TO_DSP/DATA/TEST_beh.prj
FPGA_TO_DSP/DATA/TEST_isim_beh.exe
FPGA_TO_DSP/DATA/TEST_isim_beh.wdb
FPGA_TO_DSP/DATA

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