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文件名称:AD_sampling

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2015-01-19
  • 文件大小：
    2.12mb
  • 已下载：
    2次
  • 提 供 者：
    wang ******
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于Verilog的AD采样FPGA程序,如果使用的话，FPGA接口重新设置即可-AD Sampling verilog program that is based on FPGA，if used，the IO Pins of FPGA should be redifined
(系统自动生成,下载前可以参看下载内容)

下载文件列表

AD_sampling/
AD_sampling/AD_sampling.v
AD_sampling/ErrorCode_CPU.bsf
AD_sampling/ErrorCode_CPU.v
AD_sampling/ErrorCode_CPU.v.bak
AD_sampling/FPGA.asm.rpt
AD_sampling/FPGA.bdf
AD_sampling/FPGA.cdf
AD_sampling/FPGA.done
AD_sampling/FPGA.dpf
AD_sampling/FPGA.fit.rpt
AD_sampling/FPGA.fit.smsg
AD_sampling/FPGA.fit.summary
AD_sampling/FPGA.flow.rpt
AD_sampling/FPGA.map.rpt
AD_sampling/FPGA.map.smsg
AD_sampling/FPGA.map.summary
AD_sampling/FPGA.pin
AD_sampling/FPGA.pof
AD_sampling/FPGA.qpf
AD_sampling/FPGA.qsf
AD_sampling/FPGA.qws
AD_sampling/FPGA.sim.rpt
AD_sampling/FPGA.sof
AD_sampling/FPGA.sta.rpt
AD_sampling/FPGA.sta.summary
AD_sampling/FPGA.tcl
AD_sampling/FPGA.tcl.bak
AD_sampling/FPGA.vwf
AD_sampling/PLL.bsf
AD_sampling/PLL.ppf
AD_sampling/PLL.qip
AD_sampling/PLL.v
AD_sampling/PLL_bb.v
AD_sampling/PLL_wave0.jpg
AD_sampling/PLL_waveforms.html
AD_sampling/data.bsf
AD_sampling/data.v
AD_sampling/data.v.bak
AD_sampling/db/
AD_sampling/db/FPGA.(0).cnf.cdb
AD_sampling/db/FPGA.(0).cnf.hdb
AD_sampling/db/FPGA.(1).cnf.cdb
AD_sampling/db/FPGA.(1).cnf.hdb
AD_sampling/db/FPGA.(2).cnf.cdb
AD_sampling/db/FPGA.(2).cnf.hdb
AD_sampling/db/FPGA.(3).cnf.cdb
AD_sampling/db/FPGA.(3).cnf.hdb
AD_sampling/db/FPGA.(4).cnf.cdb
AD_sampling/db/FPGA.(4).cnf.hdb
AD_sampling/db/FPGA.(5).cnf.cdb
AD_sampling/db/FPGA.(5).cnf.hdb
AD_sampling/db/FPGA.(7).cnf.cdb
AD_sampling/db/FPGA.(7).cnf.hdb
AD_sampling/db/FPGA.(8).cnf.cdb
AD_sampling/db/FPGA.(8).cnf.hdb
AD_sampling/db/FPGA.(9).cnf.cdb
AD_sampling/db/FPGA.(9).cnf.hdb
AD_sampling/db/FPGA.ace_cmp.bpm
AD_sampling/db/FPGA.ace_cmp.cdb
AD_sampling/db/FPGA.ace_cmp.ecobp
AD_sampling/db/FPGA.ace_cmp.hdb
AD_sampling/db/FPGA.asm.qmsg
AD_sampling/db/FPGA.cbx.xml
AD_sampling/db/FPGA.cmp.bpm
AD_sampling/db/FPGA.cmp.cdb
AD_sampling/db/FPGA.cmp.ecobp
AD_sampling/db/FPGA.cmp.hdb
AD_sampling/db/FPGA.cmp.kpt
AD_sampling/db/FPGA.cmp.logdb
AD_sampling/db/FPGA.cmp.rdb
AD_sampling/db/FPGA.cmp_merge.kpt
AD_sampling/db/FPGA.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
AD_sampling/db/FPGA.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
AD_sampling/db/FPGA.db_info
AD_sampling/db/FPGA.eco.cdb
AD_sampling/db/FPGA.eds_overflow
AD_sampling/db/FPGA.fit.qmsg
AD_sampling/db/FPGA.hier_info
AD_sampling/db/FPGA.hif
AD_sampling/db/FPGA.lpc.html
AD_sampling/db/FPGA.lpc.rdb
AD_sampling/db/FPGA.lpc.txt
AD_sampling/db/FPGA.map.bpm
AD_sampling/db/FPGA.map.cdb
AD_sampling/db/FPGA.map.ecobp
AD_sampling/db/FPGA.map.hdb
AD_sampling/db/FPGA.map.kpt
AD_sampling/db/FPGA.map.logdb
AD_sampling/db/FPGA.map.qmsg
AD_sampling/db/FPGA.map_bb.cdb
AD_sampling/db/FPGA.map_bb.hdb
AD_sampling/db/FPGA.map_bb.logdb
AD_sampling/db/FPGA.pre_map.cdb
AD_sampling/db/FPGA.pre_map.hdb
AD_sampling/db/FPGA.rtlv.hdb
AD_sampling/db/FPGA.rtlv_sg.cdb
AD_sampling/db/FPGA.rtlv_sg_swap.cdb
AD_sampling/db/FPGA.sgdiff.cdb
AD_sampling/db/FPGA.sgdiff.hdb
AD_sampling/db/FPGA.sim.cvwf
AD_sampling/db/FPGA.sim.hdb
AD_sampling/db/FPGA.sim.qmsg
AD_sampling/db/FPGA.sim.rdb
AD_sampling/db/FPGA.sld_design_entry.sci
AD_sampling/db/FPGA.sld_design_entry_dsc.sci
AD_sampling/db/FPGA.sta.qmsg
AD_sampling/db/FPGA.sta.rdb
AD_sampling/db/FPGA.sta_cmp.8_slow_1200mv_85c.tdb
AD_sampling/db/FPGA.syn_hier_info
AD_sampling/db/FPGA.tis_db_list.ddb
AD_sampling/db/FPGA.tiscmp.fast_1200mv_0c.ddb
AD_sampling/db/FPGA.tiscmp.slow_1200mv_0c.ddb
AD_sampling/db/FPGA.tiscmp.slow_1200mv_85c.ddb
AD_sampling/db/FPGA.tmw_info
AD_sampling/db/FPGA_global_asgn_op.abo
AD_sampling/db/PLL_altpll.v
AD_sampling/db/prev_cmp_FPGA.asm.qmsg
AD_sampling/db/prev_cmp_FPGA.fit.qmsg
AD_sampling/db/prev_cmp_FPGA.map.qmsg
AD_sampling/db/prev_cmp_FPGA.qmsg
AD_sampling/db/prev_cmp_FPGA.sim.qmsg
AD_sampling/db/prev_cmp_FPGA.sta.qmsg
AD_sampling/db/wed.wsf
AD_sampling/dband.bsf
AD_sampling/dband.v
AD_sampling/dband.v.bak
AD_sampling/delay.bsf
AD_sampling/delay.v
AD_sampling/div.bsf
AD_sampling/div.v
AD_sampling/div.v.bak
AD_sampling/incremental_db/
AD_sampling/incremental_db/README
AD_sampling/incremental_db/compiled_partitions/
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.cmp.atm
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.cmp.dfp
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.cmp.hdbx
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.cmp.kpt
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.cmp.logdb
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.cmp.rcf
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.map.atm
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.map.dpi
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.map.hdbx
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.map.kpt
AD_sampling/incremental_db/compiled_partitions/FPGA.root_partition.merge_hb.atm
AD_sampling/switch_delay.bsf
AD_sampling/swtich_delay.v
AD_sampling/swtich_delay.v.bak

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