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文件名称:qiangdaqi

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [Windows] [程序]
  • 上传时间：
    2015-01-25
  • 文件大小：
    812.19kb
  • 已下载：
    0次
  • 提 供 者：
    范***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基本功能：

1. 八路抢答器，同时供8个选手参赛，编号分别为1到8。每位选手用一个答题按钮和LED灯，选手按下时其灯亮。

2. 给主持人一个控制开关，实现系统的复位、抢答开始和分数清零。

3. 具有数据锁存和显示功能。抢答开始后，如果有选手按下了抢答按钮，其编号立即锁存并显示在LCD液晶显示屏上。此外，禁止其他选手再次抢答。选手的编号一直会保存，直到主持人清除。

-Basic features: 1. Eight Responder, while for eight contestants, numbered 1-8. Each player with an answer button and LED lights, when the players pressed their lights. 2. to host a control switch, reset the system to achieve, the answer began and scores cleared. 3. With the data latch and display functions. After the answer begins, if there are players pressed the answer button, its number immediately latched and displayed on the LCD screen. Furthermore, against other players answer again. Number of players have been saved until the host clears.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

MY抢答器/FPGA_Project1.PrjFpg
MY抢答器/FPGA_Project1.PrjFpgStructure
MY抢答器/History/FPGA_Project1.~(1).PrjFpg.Zip
MY抢答器/History/FPGA_Project1.~(2).PrjFpg.Zip
MY抢答器/History/FPGA_Project1.~(3).PrjFpg.Zip
MY抢答器/History/jishi.~(1).SchLib.Zip
MY抢答器/History/Sheet3.~(1).SchDoc.Zip
MY抢答器/History/Sheet3.~(2).SchDoc.Zip
MY抢答器/History/Sheet3.~(3).SchDoc.Zip
MY抢答器/History/VHDL2.~(1).Vhd.Zip
MY抢答器/History/VHDL2.~(2).Vhd.Zip
MY抢答器/History/VHDL2.~(3).Vhd.Zip
MY抢答器/History/VHDL3.~(1).Vhd.Zip
MY抢答器/jianbie.SchLib
MY抢答器/jifen.SchLib
MY抢答器/jishi.SchLib
MY抢答器/key_scan.SchLib
MY抢答器/lcd_scan.SchLib
MY抢答器/Project Logs for FPGA_Project1/Sheet3 SCH ECO 2013-6-7 12-24-28.LOG
MY抢答器/Project Logs for FPGA_Project1/Sheet3 SCH ECO 2013-6-7 12-36-32.LOG
MY抢答器/ProjectOutputs/Sheet3.VHD
MY抢答器/ProjectOutputs/Status Report.Txt
MY抢答器/ProjectOutputs/__Previews/Sheet3.VHDPreview
MY抢答器/Sheet3.SchDoc
MY抢答器/suocun.SchLib
MY抢答器/VHDL1.Vhd
MY抢答器/VHDL2.Vhd
MY抢答器/VHDL3.Vhd
MY抢答器/VHDL4.Vhd
MY抢答器/VHDL5.Vhd
MY抢答器/VHDL6.Vhd
MY抢答器/VHDL7.Vhd
MY抢答器/VHDL8.Vhd
MY抢答器/voice.SchLib
MY抢答器/zubieshuchu.SchLib
MY抢答器/__Previews/Sheet3.SchDocPreview
MY抢答器/__Previews/VHDL1.VhdPreview
MY抢答器/__Previews/VHDL2.VhdPreview
MY抢答器/__Previews/VHDL3.VhdPreview
MY抢答器/__Previews/VHDL4.VhdPreview
MY抢答器/__Previews/VHDL5.VhdPreview
MY抢答器/__Previews/VHDL6.VhdPreview
MY抢答器/__Previews/VHDL7.VhdPreview
MY抢答器/__Previews/VHDL8.VhdPreview
MY抢答器/控制和计分模块的波形仿真/FPGA_Project2.PrjFpg
MY抢答器/控制和计分模块的波形仿真/FPGA_Project2.SO
MY抢答器/控制和计分模块的波形仿真/FPGA_Project5.PrjFpg
MY抢答器/控制和计分模块的波形仿真/FPGA_Project5.SO
MY抢答器/控制和计分模块的波形仿真/Test_aaa.VHDTST
MY抢答器/控制和计分模块的波形仿真/Test_jf.VHDTST
MY抢答器/控制和计分模块的波形仿真/VHDL1.Vhd
MY抢答器/控制和计分模块的波形仿真/VHDL4.Vhd
MY抢答器/控制和计分模块的波形仿真/__Previews/VHDL1.VhdPreview
MY抢答器/锁存和计时的波形图仿真/FPGA_Project1.PrjFpg
MY抢答器/锁存和计时的波形图仿真/FPGA_Project1.SO
MY抢答器/锁存和计时的波形图仿真/FPGA_Project2.PrjFpg
MY抢答器/锁存和计时的波形图仿真/FPGA_Project2.SO
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project1.~(1).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project1.~(2).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project1.~(3).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project1.~(4).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project1.~(5).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project1.~(6).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(1).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(1).SO.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(10).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(2).SO.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(3).SO.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(4).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(5).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(6).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(7).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(8).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/FPGA_Project2.~(9).PrjFpg.Zip
MY抢答器/锁存和计时的波形图仿真/History/Test_suocun.~(1).VHDTST.Zip
MY抢答器/锁存和计时的波形图仿真/History/Test_suocun.~(2).VHDTST.Zip
MY抢答器/锁存和计时的波形图仿真/History/Test_suocun.~(3).VHDTST.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(1).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(10).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(11).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(12).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(13).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(14).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(15).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(16).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(6).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(7).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(8).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL1.~(9).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(1).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(10).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(11).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(12).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(2).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(3).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(4).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(5).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(6).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(7).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(8).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/History/VHDL9.~(9).Vhd.Zip
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project1_BUILT_IN_ALDEC/FPGA_Project1.top
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2.AL
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/FPGA_Project2/0FPGA_Project2.mgf
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/FPGA_Project2/1FPGA_Project2.mgf
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/FPGA_Project2/3FPGA_Project2.mgf
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/FPGA_Project2/elaboration.log
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/FPGA_Project2/FPGA_Project2.lib
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/FPGA_Project2.top
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/library.cfg
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/projlib.cfg
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/results.txt
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/FPGA_Project2_BUILT_IN_ALDEC/wave.asdb
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/Test_suocun.AN
MY抢答器/锁存和计时的波形图仿真/ProjectOutputs/VHDL1.AN
MY抢答器/锁存和计时的波形图仿真/Te

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