文件名称:Four-bit-signed-number-division
-
所属分类:
- 标签属性:
- 上传时间:2015-11-02
-
文件大小:4.03kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
设计四位定点有符号整数除法器(op=ai÷bi),软件仿真通过后下载到FPGA板子进行验证
[具体要求]
1、 使用clock为输入时钟信号,其频率为50MHz
2、 使用拨码开关sw7~sw4为被除数ai,其中sw7为MSB(高位),sw4为LSB(低位)
3、 使用拨码开关sw3~sw0为除数bi,其中sw3为MSB,sw0为LSB
4、 使用按钮btn<0>作为输入确定信号,在每次改变输入时按下按钮得到输出结果
5、 以LED7~4为所得商op,LED3为MSB,灯亮代表该位为1.
6、 以LED3~0为所得余数,LED7为MSB
7、 若除数为0,则led7闪烁(闪烁频率自定义,以肉眼能分辨为准),led6~0熄灭
-Design of four sentinel signed integer divider (op = aibi), the software downloaded to the FPGA board through simulation to validate [the specific requirements] 1, using the clock as an input clock signal having a frequency of 50MHz 2, using a DIP switch sw7 ~ sw4 as dividend ai, which sw7 is MSB (high), sw4 for the LSB (low) 3, using DIP switches sw3 ~ sw0 divisor bi, where sw3 is MSB, sw0 for the LSB 4, using the buttons btn < 0> determining the signal as an input, press the Enter button at each change to get the output 5 to LED7 ~ 4 as the quotient op, LED3 is MSB, lights representing the bit is 1.6 to LED3 ~ 0 is the proceeds of the remainder, LED7 the MSB 7, if the divisor is zero, then led7 flashing (frequency custom, to the naked eye can distinguish prevail), led6 ~ 0 Off
[具体要求]
1、 使用clock为输入时钟信号,其频率为50MHz
2、 使用拨码开关sw7~sw4为被除数ai,其中sw7为MSB(高位),sw4为LSB(低位)
3、 使用拨码开关sw3~sw0为除数bi,其中sw3为MSB,sw0为LSB
4、 使用按钮btn<0>作为输入确定信号,在每次改变输入时按下按钮得到输出结果
5、 以LED7~4为所得商op,LED3为MSB,灯亮代表该位为1.
6、 以LED3~0为所得余数,LED7为MSB
7、 若除数为0,则led7闪烁(闪烁频率自定义,以肉眼能分辨为准),led6~0熄灭
-Design of four sentinel signed integer divider (op = aibi), the software downloaded to the FPGA board through simulation to validate [the specific requirements] 1, using the clock as an input clock signal having a frequency of 50MHz 2, using a DIP switch sw7 ~ sw4 as dividend ai, which sw7 is MSB (high), sw4 for the LSB (low) 3, using DIP switches sw3 ~ sw0 divisor bi, where sw3 is MSB, sw0 for the LSB 4, using the buttons btn < 0> determining the signal as an input, press the Enter button at each change to get the output 5 to LED7 ~ 4 as the quotient op, LED3 is MSB, lights representing the bit is 1.6 to LED3 ~ 0 is the proceeds of the remainder, LED7 the MSB 7, if the divisor is zero, then led7 flashing (frequency custom, to the naked eye can distinguish prevail), led6 ~ 0 Off
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Four bit signed number division/bounce.vhd
Four bit signed number division/clock_divider.vhd
Four bit signed number division/division.vhd
Four bit signed number division/lout.vhd
Four bit signed number division/main.vhd
Four bit signed number division
Four bit signed number division/clock_divider.vhd
Four bit signed number division/division.vhd
Four bit signed number division/lout.vhd
Four bit signed number division/main.vhd
Four bit signed number division
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.