ppmu/component/Actel/DirectCore/COREUART/5.1.102/coreparameters.v
ppmu/component/Actel/DirectCore/COREUART/5.1.102/COREUART.cxf
ppmu/component/work/ppmhfd/ppmhfd.cxf
ppmu/component/work/ppmhfd/ppmhfd.sdb
ppmu/component/work/ppmhfd/ppmhfd.v
ppmu/component/work/ppmhfd/testbench.v
ppmu/component/work/uare/testbench.v
ppmu/component/work/uare/uare.cxf
ppmu/component/work/uare/uare.sdb
ppmu/component/work/uare/uare.v
ppmu/component/work/uare/uare_0/mti/scripts/wave_vlog.do
ppmu/component/work/uare/uare_0/rtl/vlog/core_obfuscated/Clock_gen.v
ppmu/component/work/uare/uare_0/rtl/vlog/core_obfuscated/CoreUART.v
ppmu/component/work/uare/uare_0/rtl/vlog/core_obfuscated/fifo_256x8_pa3.v
ppmu/component/work/uare/uare_0/rtl/vlog/core_obfuscated/Rx_async.v
ppmu/component/work/uare/uare_0/rtl/vlog/core_obfuscated/Tx_async.v
ppmu/component/work/uare/uare_0/rtl/vlog/test/user/testbnch.v
ppmu/component/work/uare/uare_0/uare_uare_0_COREUART.cxf
ppmu/component/work/uartb/testbench.v
ppmu/component/work/uartb/uartb.cxf
ppmu/component/work/uartb/uartb.sdb
ppmu/component/work/uartb/uartb.v
ppmu/component/work/uartb/uartb_0/mti/scripts/wave_vlog.do
ppmu/component/work/uartb/uartb_0/rtl/vlog/core_obfuscated/Clock_gen.v
ppmu/component/work/uartb/uartb_0/rtl/vlog/core_obfuscated/CoreUART.v
ppmu/component/work/uartb/uartb_0/rtl/vlog/core_obfuscated/fifo_256x8_pa3.v
ppmu/component/work/uartb/uartb_0/rtl/vlog/core_obfuscated/Rx_async.v
ppmu/component/work/uartb/uartb_0/rtl/vlog/core_obfuscated/Tx_async.v
ppmu/component/work/uartb/uartb_0/rtl/vlog/test/user/testbnch.v
ppmu/component/work/uartb/uartb_0/uartb_uartb_0_COREUART.cxf
ppmu/constraint/aa.pdc
ppmu/constraint/aaa.pdc
ppmu/constraint/aaaa.pdc
ppmu/constraint/cc.sdc
ppmu/constraint/data/aa.pdc.ce
ppmu/constraint/data/aaa.pdc.ce
ppmu/constraint/data/aaaa.pdc.ce
ppmu/designer/impl1/ada02288-1.tmp
ppmu/designer/impl1/ada03252-1.tmp
ppmu/designer/impl1/af0.ini
ppmu/designer/impl1/af2.hdr
ppmu/designer/impl1/bytec.ide_des
ppmu/designer/impl1/data.ide_des
ppmu/designer/impl1/datac.ide_des
ppmu/designer/impl1/datacc.ide_des
ppmu/designer/impl1/delay.ide_des
ppmu/designer/impl1/designer.log
ppmu/designer/impl1/designer_synth_check.log
ppmu/designer/impl1/fifo.ide_des
ppmu/designer/impl1/in.ide_des
ppmu/designer/impl1/initialsys.ide_des
ppmu/designer/impl1/pllcc.ide_des
ppmu/designer/impl1/ppm.ide_des
ppmu/designer/impl1/ppmde.ide_des
ppmu/designer/impl1/ppmhfd.adb
ppmu/designer/impl1/ppmhfd.dtf/constraints
ppmu/designer/impl1/ppmhfd.dtf/inverted_ports
ppmu/designer/impl1/ppmhfd.dtf/last_placement.gcf
ppmu/designer/impl1/ppmhfd.dtf/masks
ppmu/designer/impl1/ppmhfd.dtf/masks.final
ppmu/designer/impl1/ppmhfd.dtf/mem_plmt.gcf
ppmu/designer/impl1/ppmhfd.dtf/place.log
ppmu/designer/impl1/ppmhfd.dtf/route.log
ppmu/designer/impl1/ppmhfd.dtf/swloc
ppmu/designer/impl1/ppmhfd.dtf/terackt
ppmu/designer/impl1/ppmhfd.dtf/teralib
ppmu/designer/impl1/ppmhfd.dtf/terapld
ppmu/designer/impl1/ppmhfd.dtf/terapld.final
ppmu/designer/impl1/ppmhfd.dtf/typeFile
ppmu/designer/impl1/ppmhfd.dtf/verify.log
ppmu/designer/impl1/ppmhfd.ide_des
ppmu/designer/impl1/ppmhfd.lok
ppmu/designer/impl1/ppmhfd.pdb
ppmu/designer/impl1/ppmhfd.pdb.depends
ppmu/designer/impl1/ppmhfd.tcl
ppmu/designer/impl1/ppmhfda.pdb
ppmu/designer/impl1/ppmhfda.pdb.depends
ppmu/designer/impl1/ppmhfd_1.adb
ppmu/designer/impl1/ppmhfd_1.dtf/verify.log
ppmu/designer/impl1/ppmhfd_1.ide_des
ppmu/designer/impl1/ppmhfd_1.pdb
ppmu/designer/impl1/ppmhfd_1.pdb.depends
ppmu/designer/impl1/ppmhfd_1_fp/$$FlashPro_FPBBALTLPT1.L$$
ppmu/designer/impl1/ppmhfd_1_fp/ppmhfd_1.log
ppmu/designer/impl1/ppmhfd_1_fp/ppmhfd_1.pro
ppmu/designer/impl1/ppmhfd_1_fp/projectData/ppmhfd_1.pdb
ppmu/designer/impl1/ppmhfd_1_fp_1/$$FlashPro_FPBBALTLPT1.L$$
ppmu/designer/impl1/ppmhfd_1_fp_1/ppmhfd_1.log
ppmu/designer/impl1/ppmhfd_1_fp_1/ppmhfd_1.pro
ppmu/designer/impl1/ppmhfd_1_fp_1/projectData/ppmhfd_1.pdb
ppmu/designer/impl1/ppmhfd_1_iteration_summary.rpt
ppmu/designer/impl1/ppmhfd_1_layout.log
ppmu/designer/impl1/ppmhfd_1_power.rpt
ppmu/designer/impl1/ppmhfd_1_power_r1_initial.rpt
ppmu/designer/impl1/ppmhfd_1_power_r1_s1.rpt
ppmu/designer/impl1/ppmhfd_1_power_r1_s2.rpt
ppmu/designer/impl1/ppmhfd_1_power_r1_s3.rpt
ppmu/designer/impl1/ppmhfd_1_power_r1_s4.rpt
ppmu/designer/impl1/ppmhfd_1_power_r1_s5.rpt
ppmu/designer/impl1/ppmhfd_1_power_r2_initial.rpt
ppmu/designer/impl1/ppmhfd_1_power_r2_s6.rpt
ppmu/designer/impl1/ppmhfd_1_power_r2_s7.rpt
ppmu/designer/impl1/ppmhfd_1_power_r3_initial.rpt
ppmu/designer/impl1/ppmhfd_1_power_r3_s10.rpt
ppmu/designer/impl1/ppmhfd_1_power_r3_s11.rpt
ppmu/designer/impl1/ppmhfd_1_power_r3_s9.rpt
ppmu/designer/impl1/ppmhfd_1_power_r4_initial.rpt
ppmu/designer/impl1/ppmhfd_1_power_r4_s13.rpt
ppmu/designer/impl1/ppmhfd_1_power_r4_s14.rpt
ppmu/designer/impl1/ppmhfd_1_power_r5_initial.rpt
ppmu/designer/impl1/ppmhfd_1_power_r5_s15.rpt
ppmu/designer/impl1/ppmhfd_1_power_r5_s16.rpt
ppmu/designer/impl1/ppmhfd_1_power_r6_s17.rpt
ppmu/designer/impl1/ppmhfd_1_power_r6_s18.rpt
ppmu/designer/impl1/ppmhfd_1_power_r6_s19.rpt
ppmu/designer/impl1/ppmhfd_1_timing.rpt
ppmu/designer/impl1/ppmhfd_1_t