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文件名称:PC_FPGA_Communication

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [HTML]
  • 上传时间：
    2017-02-24
  • 文件大小：
    1.44mb
  • 已下载：
    0次
  • 提 供 者：
    kc***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

本软件利用串口实现了电脑和FPGA的通讯。采用vhdl。就是为了FPGA开发的基础软件。-This software uses serial port to realize the communication between computer and FPGA. Using vhdl.　this is the basic software to develop the FPGA.　
(系统自动生成,下载前可以参看下载内容)

下载文件列表

PC_FPGA_Communication/db/PC_Cpld_Communication.(0).cnf.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.(0).cnf.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.asm.qmsg
PC_FPGA_Communication/db/PC_Cpld_Communication.asm_labs.ddb
PC_FPGA_Communication/db/PC_Cpld_Communication.cbx.xml
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp.bpm
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp.ecobp
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp.kpt
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp.logdb
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp.rdb
PC_FPGA_Communication/db/PC_Cpld_Communication.cmp_merge.kpt
PC_FPGA_Communication/db/PC_Cpld_Communication.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
PC_FPGA_Communication/db/PC_Cpld_Communication.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
PC_FPGA_Communication/db/PC_Cpld_Communication.db_info
PC_FPGA_Communication/db/PC_Cpld_Communication.eco.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.eda.qmsg
PC_FPGA_Communication/db/PC_Cpld_Communication.eds_overflow
PC_FPGA_Communication/db/PC_Cpld_Communication.fit.qmsg
PC_FPGA_Communication/db/PC_Cpld_Communication.hier_info
PC_FPGA_Communication/db/PC_Cpld_Communication.hif
PC_FPGA_Communication/db/PC_Cpld_Communication.lpc.html
PC_FPGA_Communication/db/PC_Cpld_Communication.lpc.rdb
PC_FPGA_Communication/db/PC_Cpld_Communication.lpc.txt
PC_FPGA_Communication/db/PC_Cpld_Communication.map.bpm
PC_FPGA_Communication/db/PC_Cpld_Communication.map.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.map.ecobp
PC_FPGA_Communication/db/PC_Cpld_Communication.map.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.map.kpt
PC_FPGA_Communication/db/PC_Cpld_Communication.map.logdb
PC_FPGA_Communication/db/PC_Cpld_Communication.map.qmsg
PC_FPGA_Communication/db/PC_Cpld_Communication.map_bb.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.map_bb.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.map_bb.logdb
PC_FPGA_Communication/db/PC_Cpld_Communication.pre_map.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.pre_map.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.rtlv.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.rtlv_sg.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.rtlv_sg_swap.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.sgdiff.cdb
PC_FPGA_Communication/db/PC_Cpld_Communication.sgdiff.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.sim.cvwf
PC_FPGA_Communication/db/PC_Cpld_Communication.sim.hdb
PC_FPGA_Communication/db/PC_Cpld_Communication.sim.qmsg
PC_FPGA_Communication/db/PC_Cpld_Communication.sim.rdb
PC_FPGA_Communication/db/PC_Cpld_Communication.sld_design_entry.sci
PC_FPGA_Communication/db/PC_Cpld_Communication.sld_design_entry_dsc.sci
PC_FPGA_Communication/db/PC_Cpld_Communication.sta.qmsg
PC_FPGA_Communication/db/PC_Cpld_Communication.sta.rdb
PC_FPGA_Communication/db/PC_Cpld_Communication.sta_cmp.8_slow_1200mv_85c.tdb
PC_FPGA_Communication/db/PC_Cpld_Communication.syn_hier_info
PC_FPGA_Communication/db/PC_Cpld_Communication.tiscmp.fast_1200mv_0c.ddb
PC_FPGA_Communication/db/PC_Cpld_Communication.tiscmp.slow_1200mv_0c.ddb
PC_FPGA_Communication/db/PC_Cpld_Communication.tiscmp.slow_1200mv_85c.ddb
PC_FPGA_Communication/db/PC_Cpld_Communication.tis_db_list.ddb
PC_FPGA_Communication/db/PC_Cpld_Communication_global_asgn_op.abo
PC_FPGA_Communication/db/prev_cmp_PC_Cpld_Communication.asm.qmsg
PC_FPGA_Communication/db/prev_cmp_PC_Cpld_Communication.eda.qmsg
PC_FPGA_Communication/db/prev_cmp_PC_Cpld_Communication.fit.qmsg
PC_FPGA_Communication/db/prev_cmp_PC_Cpld_Communication.map.qmsg
PC_FPGA_Communication/db/prev_cmp_PC_Cpld_Communication.qmsg
PC_FPGA_Communication/db/prev_cmp_PC_Cpld_Communication.sim.qmsg
PC_FPGA_Communication/db/prev_cmp_PC_Cpld_Communication.sta.qmsg
PC_FPGA_Communication/db/wed.wsf
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.cmp.atm
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.cmp.dfp
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.cmp.hdbx
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.cmp.kpt
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.cmp.logdb
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.cmp.rcf
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.map.atm
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.map.dpi
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.map.hdbx
PC_FPGA_Communication/incremental_db/compiled_partitions/PC_Cpld_Communication.root_partition.map.kpt
PC_FPGA_Communication/incremental_db/README
PC_FPGA_Communication/PC_Cpld_Communication.asm.rpt
PC_FPGA_Communication/PC_Cpld_Communication.done
PC_FPGA_Communication/PC_Cpld_Communication.eda.

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