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文件名称:SEQ_DETECTOR

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [Matlab] [源码]
  • 上传时间：
    2017-08-07
  • 文件大小：
    1.77mb
  • 已下载：
    0次
  • 提 供 者：
    LLaw*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

这是一个四位串行数据检测器，一共有三种模式可以选择：递增（检测连续四位递增序列），递减（检测连续四位递减序列）和不变（检测连续四位不变序列）。整个设计采用同步时钟，异步复位，用米利状态机，并配置好了仿真环境和仿真文件。(This is a four bit sequence detector, including three modes that can be selected: increment mode (detecting four consistency increment data), decrement mode (detecting four consistency decrement data) and steadiness mode (detecting four consistency same data). The whole design adopts synchronous clock, asynchronous reset, and uses Mealy state machine. The whole file concludes the simulation environment and testbench.)
相关搜索： sequence detector verilog

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下载文件列表

SEQ_DETECTOR/rtl/SEQ_DETECTOR.v
SEQ_DETECTOR/sim/cm.log
SEQ_DETECTOR/sim/csrc/amcQwB.o
SEQ_DETECTOR/sim/csrc/archive.43/_19525_archive_1.a
SEQ_DETECTOR/sim/csrc/archive.43/_19525_archive_1.a.info
SEQ_DETECTOR/sim/csrc/cginfo.json
SEQ_DETECTOR/sim/csrc/cgproc.19525.json
SEQ_DETECTOR/sim/csrc/filelist
SEQ_DETECTOR/sim/csrc/filelist.cu
SEQ_DETECTOR/sim/csrc/filelist.dpi
SEQ_DETECTOR/sim/csrc/filelist.hsopt
SEQ_DETECTOR/sim/csrc/filelist.hsopt.llvm2_0.objs
SEQ_DETECTOR/sim/csrc/filelist.hsopt.objs
SEQ_DETECTOR/sim/csrc/filelist.pli
SEQ_DETECTOR/sim/csrc/import_dpic.h
SEQ_DETECTOR/sim/csrc/incr.sdb
SEQ_DETECTOR/sim/csrc/Makefile
SEQ_DETECTOR/sim/csrc/Makefile.hsopt
SEQ_DETECTOR/sim/csrc/objs/amcQw_d.o
SEQ_DETECTOR/sim/csrc/product_timestamp
SEQ_DETECTOR/sim/csrc/rmapats.c
SEQ_DETECTOR/sim/csrc/rmapats.h
SEQ_DETECTOR/sim/csrc/rmapats.m
SEQ_DETECTOR/sim/csrc/rmapats.o
SEQ_DETECTOR/sim/csrc/rmapats_mop.o
SEQ_DETECTOR/sim/csrc/rmar.c
SEQ_DETECTOR/sim/csrc/rmar.h
SEQ_DETECTOR/sim/csrc/rmar.o
SEQ_DETECTOR/sim/csrc/rmar0.h
SEQ_DETECTOR/sim/csrc/rmar_llvm_0_0.o
SEQ_DETECTOR/sim/csrc/rmar_llvm_0_1.o
SEQ_DETECTOR/sim/csrc/SIM_l.o
SEQ_DETECTOR/sim/csrc/vcspieces.incr
SEQ_DETECTOR/sim/csrc/_10399_archive_1.so
SEQ_DETECTOR/sim/csrc/_10527_archive_1.so
SEQ_DETECTOR/sim/csrc/_10960_archive_1.so
SEQ_DETECTOR/sim/csrc/_11369_archive_1.so
SEQ_DETECTOR/sim/csrc/_11733_archive_1.so
SEQ_DETECTOR/sim/csrc/_12328_archive_1.so
SEQ_DETECTOR/sim/csrc/_12822_archive_1.so
SEQ_DETECTOR/sim/csrc/_12853_archive_1.so
SEQ_DETECTOR/sim/csrc/_12946_archive_1.so
SEQ_DETECTOR/sim/csrc/_12978_archive_1.so
SEQ_DETECTOR/sim/csrc/_14656_archive_1.so
SEQ_DETECTOR/sim/csrc/_14946_archive_1.so
SEQ_DETECTOR/sim/csrc/_15213_archive_1.so
SEQ_DETECTOR/sim/csrc/_15281_archive_1.so
SEQ_DETECTOR/sim/csrc/_16509_archive_1.so
SEQ_DETECTOR/sim/csrc/_16926_archive_1.so
SEQ_DETECTOR/sim/csrc/_17446_archive_1.so
SEQ_DETECTOR/sim/csrc/_1890_archive_1.so
SEQ_DETECTOR/sim/csrc/_19525_archive_1.so
SEQ_DETECTOR/sim/csrc/_20654_archive_1.so
SEQ_DETECTOR/sim/csrc/_20665_archive_1.so
SEQ_DETECTOR/sim/csrc/_21953_archive_1.so
SEQ_DETECTOR/sim/csrc/_22591_archive_1.so
SEQ_DETECTOR/sim/csrc/_23110_archive_1.so
SEQ_DETECTOR/sim/csrc/_23372_archive_1.so
SEQ_DETECTOR/sim/csrc/_2404_archive_1.so
SEQ_DETECTOR/sim/csrc/_26882_archive_1.so
SEQ_DETECTOR/sim/csrc/_27534_archive_1.so
SEQ_DETECTOR/sim/csrc/_27933_archive_1.so
SEQ_DETECTOR/sim/csrc/_28353_archive_1.so
SEQ_DETECTOR/sim/csrc/_28440_archive_1.so
SEQ_DETECTOR/sim/csrc/_28626_archive_1.so
SEQ_DETECTOR/sim/csrc/_31112_archive_1.so
SEQ_DETECTOR/sim/csrc/_31820_archive_1.so
SEQ_DETECTOR/sim/csrc/_31908_archive_1.so
SEQ_DETECTOR/sim/csrc/_32592_archive_1.so
SEQ_DETECTOR/sim/csrc/_3326_archive_1.so
SEQ_DETECTOR/sim/csrc/_5506_archive_1.so
SEQ_DETECTOR/sim/csrc/_5648_archive_1.so
SEQ_DETECTOR/sim/csrc/_5998_archive_1.so
SEQ_DETECTOR/sim/csrc/_8104_archive_1.so
SEQ_DETECTOR/sim/csrc/_9465_archive_1.so
SEQ_DETECTOR/sim/csrc/_9587_archive_1.so
SEQ_DETECTOR/sim/csrc/_prev_archive_1.so
SEQ_DETECTOR/sim/csrc/_prev_cginfo.json
SEQ_DETECTOR/sim/csrc/_vcs_const_SIM_0.incr.dat
SEQ_DETECTOR/sim/csrc/_vcs_etype_SIM_0.incr.dat
SEQ_DETECTOR/sim/csrc/_vcs_pli_stub_.c
SEQ_DETECTOR/sim/csrc/_vcs_pli_stub_.o
SEQ_DETECTOR/sim/makefile
SEQ_DETECTOR/sim/novas.conf
SEQ_DETECTOR/sim/novas.rc
SEQ_DETECTOR/sim/novas_dump.log
SEQ_DETECTOR/sim/simfiles.f
SEQ_DETECTOR/sim/simv
SEQ_DETECTOR/sim/simv.daidir/.vcs.timestamp.tmp
SEQ_DETECTOR/sim/simv.daidir/binmap.sdb
SEQ_DETECTOR/sim/simv.daidir/build_db
SEQ_DETECTOR/sim/simv.daidir/cc/cc_bcode.db
SEQ_DETECTOR/sim/simv.daidir/cc/cc_dummy_file
SEQ_DETECTOR/sim/simv.daidir/cgname.json
SEQ_DETECTOR/sim/simv.daidir/covg_defs
SEQ_DETECTOR/sim/simv.daidir/debug_dump/.version
SEQ_DETECTOR/sim/simv.daidir/debug_dump/dumpcheck.db
SEQ_DETECTOR/sim/simv.daidir/debug_dump/HsimSigOptDb.sdb
SEQ_DETECTOR/sim/simv.daidir/debug_dump/src_files_verilog
SEQ_DETECTOR/sim/simv.daidir/debug_dump/topmodules
SEQ_DETECTOR/sim/simv.daidir/debug_dump/vir.sdb
SEQ_DETECTOR/sim/simv.daidir/eblklvl.db
SEQ_DETECTOR/sim/simv.daidir/elabmoddb.sdb
SEQ_DETECTOR/sim/simv.daidir/hslevel_callgraph.sdb
SEQ_DETECTOR/sim/simv.daidir/hslevel_level.sdb
SEQ_DETECTOR/sim/simv.daidir/hslevel_rtime_level.sdb
SEQ_DETECTOR/sim/simv.daidir/nsparam.dat
SEQ_DETECTOR/sim/simv.daidir/pcxpxmr.dat
SEQ_DETECTOR/sim/simv.daidir/prof.sdb
SEQ_DETECTOR/sim/simv.daidir/rmapats.dat
SEQ_DETECTOR/sim/simv.daidir/saifNetInfo.db
SEQ_DETECTOR/sim/simv.daidir/tt.sdb
SEQ_DETECTOR/sim/simv.daidir/vcselab_master_hsim_elabout.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_hsdef.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_hsim_elab.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_hsim_fegate.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_hsim_lvl.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_hsim_name.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_hsim_uds.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_midd.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_mnmn.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_partition.db
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_tCEYNb
SEQ_DETECTOR/sim/simv.daidir/vcselab_misc_vcselabref.db
SEQ

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