CDN加速镜像 | 设为首页 | 加入收藏夹
登陆 | 会员注册
当前位置： 首页 资源下载 源码下载 嵌入式/单片机编程 VHDL编程
收藏

文件名称:xapp1257-multiboot-fallback-spi-flash

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [Linux] [SHELL] [源码]
  • 上传时间：
    2017-09-15
  • 文件大小：
    6.62mb
  • 已下载：
    0次
  • 提 供 者：
    骄傲的****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于外部flah的FPGA多重启动程序，在应用程序启动失败时能自动返回到基础程序(A FPGA multiple startup program based on external flah that automatically returns to the underlying program when the application startup fails)
相关搜索： fpga；multiboot

(系统自动生成,下载前可以参看下载内容)

下载文件列表

Design\readme.txt
Design\ready_to_download
Design\ready_to_download\KCU105_multiboot_corrupt_idcode_spix4.mcs
Design\ready_to_download\KCU105_multiboot_spix4.mcs
Design\tcl
Design\tcl\script
Design\tcl\script\create_design.tcl
Design\tcl\script\design.xdc
Design\tcl\sources
Design\tcl\sources\Golden
Design\tcl\sources\Golden\Golden_top.vhd
Design\tcl\sources\Golden\LED_Display.vhd
Design\tcl\sources\Update
Design\tcl\sources\Update\LED_Display.vhd
Design\tcl\sources\Update\Update_top.vhd
Design\Vivado_projects
Design\Vivado_projects\Golden
Design\Vivado_projects\Golden\.Xil
Design\Vivado_projects\Golden\Golden.cache
Design\Vivado_projects\Golden\Golden.cache\compile_simlib
Design\Vivado_projects\Golden\Golden.cache\wt
Design\Vivado_projects\Golden\Golden.cache\wt\java_command_handlers.wdf
Design\Vivado_projects\Golden\Golden.cache\wt\synthesis.wdf
Design\Vivado_projects\Golden\Golden.cache\wt\synthesis_details.wdf
Design\Vivado_projects\Golden\Golden.cache\wt\webtalk_pa.xml
Design\Vivado_projects\Golden\Golden.hw
Design\Vivado_projects\Golden\Golden.hw\Golden.lpr
Design\Vivado_projects\Golden\Golden.hw\hw_1
Design\Vivado_projects\Golden\Golden.hw\hw_1\hw.xml
Design\Vivado_projects\Golden\Golden.hw\hw_1\wave
Design\Vivado_projects\Golden\Golden.hw\hw_1\xcku040_0
Design\Vivado_projects\Golden\Golden.hw\hw_1\xcku040_0\dashboard
Design\Vivado_projects\Golden\Golden.hw\hw_1\xcku040_0\dashboard\SysMon.xml
Design\Vivado_projects\Golden\Golden.runs
Design\Vivado_projects\Golden\Golden.runs\.jobs
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_1.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_10.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_11.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_12.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_13.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_14.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_2.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_3.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_4.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_5.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_6.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_7.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_8.xml
Design\Vivado_projects\Golden\Golden.runs\.jobs\vrs_config_9.xml
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\.vivado.begin.rst
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\.vivado.end.rst
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\.Vivado_Synthesis.queue.rst
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\.Xil
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\.Xil\clk_200MHZ_propImpl.xdc
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\clk_200MHZ.dcp
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\clk_200MHZ.tcl
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\clk_200MHZ.vds
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\clk_200MHZ_utilization_synth.pb
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\clk_200MHZ_utilization_synth.rpt
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\dont_touch.xdc
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\gen_run.xml
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\htr.txt
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\ISEWrap.js
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\ISEWrap.sh
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\project.wdf
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\rundef.js
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\runme.bat
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\runme.log
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\runme.sh
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\vivado.jou
Design\Vivado_projects\Golden\Golden.runs\clk_200MHZ_synth_1\vivado.pb
Design\Vivado_projects\Golden\Golden.runs\impl_1
Design\Vivado_projects\Golden\Golden.runs\impl_1\.init_design.begin.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.init_design.end.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.opt_design.begin.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.opt_design.end.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.place_design.begin.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.place_design.end.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.route_design.begin.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.route_design.end.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.vivado.begin.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.vivado.end.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.Vivado_Implementation.queue.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.write_bitstream.begin.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.write_bitstream.end.rst
Design\Vivado_projects\Golden\Golden.runs\impl_1\.Xil
Design\Vivado_projects\Golden\Golden.runs\impl_1\gen_run.xml
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden.bit
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden.hwdef
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden.sysdef
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden.tcl
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden.vdi
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden_clock_utilization_routed.rpt
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden_control_sets_placed.rpt
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden_drc_opted.rpt
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden_drc_routed.pb
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden_drc_routed.rpt
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden_io_placed.rpt
Design\Vivado_projects\Golden\Golden.runs\impl_1\Golden_opt.dcp

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台，只提供交流渠道，下载内容来自于网络，除下载问题外，其它问题请自行百度。更多...
  • 本站已设置防盗链，请勿用迅雷、QQ旋风等下载软件下载资源，下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载，请稍后再次尝试；或换浏览器；或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎，请到消费记录里找到下载记录反馈给我们，经确认后退回积分.
  • 如下载前有疑问，可以通过点击"提供者"的名字，查看对方的联系方式，联系对方咨询.
查看所有评论

相关评论

暂无评论内容．

发表评论

*快速评论： 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内　　容：
*验 证 码：
搜珍网 www.dssz.com