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文件名称:pingjie1

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    2017-11-05
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基于fpga的pi/4dqpsk 调制,用Verilog语言编写(Pi/4dqpsk modulation based on FPGA, written in Verilog language)
相关搜索: pi/4dqpsk 调制 FPGA verilog

(系统自动生成,下载前可以参看下载内容)

下载文件列表

pingjie1
pingjie1\doc
pingjie1\img
pingjie1\prj
pingjie1\prj\4dqpsk.asm.rpt
pingjie1\prj\4dqpsk.done
pingjie1\prj\4dqpsk.eda.rpt
pingjie1\prj\4dqpsk.fit.rpt
pingjie1\prj\4dqpsk.fit.smsg
pingjie1\prj\4dqpsk.fit.summary
pingjie1\prj\4dqpsk.flow.rpt
pingjie1\prj\4dqpsk.map.rpt
pingjie1\prj\4dqpsk.map.summary
pingjie1\prj\4dqpsk.pin
pingjie1\prj\4dqpsk.qpf
pingjie1\prj\4dqpsk.qsf
pingjie1\prj\4dqpsk.sof
pingjie1\prj\4dqpsk.sta.rpt
pingjie1\prj\4dqpsk.sta.summary
pingjie1\prj\4dqpsk_nativelink_simulation.rpt
pingjie1\prj\db
pingjie1\prj\db\4dqpsk.amm.cdb
pingjie1\prj\db\4dqpsk.asm.qmsg
pingjie1\prj\db\4dqpsk.asm.rdb
pingjie1\prj\db\4dqpsk.cbx.xml
pingjie1\prj\db\4dqpsk.cmp.kpt
pingjie1\prj\db\4dqpsk.cmp.rdb
pingjie1\prj\db\4dqpsk.cmp_merge.kpt
pingjie1\prj\db\4dqpsk.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
pingjie1\prj\db\4dqpsk.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
pingjie1\prj\db\4dqpsk.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
pingjie1\prj\db\4dqpsk.db_info
pingjie1\prj\db\4dqpsk.eda.qmsg
pingjie1\prj\db\4dqpsk.fit.qmsg
pingjie1\prj\db\4dqpsk.hier_info
pingjie1\prj\db\4dqpsk.hif
pingjie1\prj\db\4dqpsk.idb.cdb
pingjie1\prj\db\4dqpsk.lpc.html
pingjie1\prj\db\4dqpsk.lpc.rdb
pingjie1\prj\db\4dqpsk.lpc.txt
pingjie1\prj\db\4dqpsk.map.bpm
pingjie1\prj\db\4dqpsk.map.cdb
pingjie1\prj\db\4dqpsk.map.hdb
pingjie1\prj\db\4dqpsk.map.kpt
pingjie1\prj\db\4dqpsk.map.logdb
pingjie1\prj\db\4dqpsk.map.qmsg
pingjie1\prj\db\4dqpsk.map_bb.cdb
pingjie1\prj\db\4dqpsk.map_bb.hdb
pingjie1\prj\db\4dqpsk.map_bb.logdb
pingjie1\prj\db\4dqpsk.pre_map.cdb
pingjie1\prj\db\4dqpsk.pre_map.hdb
pingjie1\prj\db\4dqpsk.rtlv.hdb
pingjie1\prj\db\4dqpsk.rtlv_sg.cdb
pingjie1\prj\db\4dqpsk.rtlv_sg_swap.cdb
pingjie1\prj\db\4dqpsk.sgdiff.cdb
pingjie1\prj\db\4dqpsk.sgdiff.hdb
pingjie1\prj\db\4dqpsk.sld_design_entry.sci
pingjie1\prj\db\4dqpsk.sld_design_entry_dsc.sci
pingjie1\prj\db\4dqpsk.smart_action.txt
pingjie1\prj\db\4dqpsk.sta.qmsg
pingjie1\prj\db\4dqpsk.sta.rdb
pingjie1\prj\db\4dqpsk.syn_hier_info
pingjie1\prj\db\4dqpsk.tiscmp.fastest_slow_1200mv_0c.ddb
pingjie1\prj\db\4dqpsk.tiscmp.fastest_slow_1200mv_85c.ddb
pingjie1\prj\db\4dqpsk.tiscmp.fast_1200mv_0c.ddb
pingjie1\prj\db\4dqpsk.tiscmp.slow_1200mv_0c.ddb
pingjie1\prj\db\4dqpsk.tiscmp.slow_1200mv_85c.ddb
pingjie1\prj\db\4dqpsk.tis_db_list.ddb
pingjie1\prj\db\4dqpsk.tmw_info
pingjie1\prj\db\logic_util_heursitic.dat
pingjie1\prj\db\prev_cmp_4dqpsk.qmsg
pingjie1\prj\incremental_db
pingjie1\prj\incremental_db\compiled_partitions
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.db_info
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.cmp.cdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.cmp.dfp
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.cmp.hdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.cmp.kpt
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.cmp.logdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.cmp.rcfdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.cdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.dpi
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.hbdb.cdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.hbdb.hb_info
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.hbdb.hdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.hbdb.sig
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.hdb
pingjie1\prj\incremental_db\compiled_partitions\4dqpsk.root_partition.map.kpt
pingjie1\prj\incremental_db\README
pingjie1\prj\ip
pingjie1\prj\simulation
pingjie1\prj\simulation\modelsim
pingjie1\prj\simulation\modelsim\4dqpsk.sft
pingjie1\prj\simulation\modelsim\4dqpsk.vo
pingjie1\prj\simulation\modelsim\4dqpsk_8_1200mv_0c_slow.vo
pingjie1\prj\simulation\modelsim\4dqpsk_8_1200mv_0c_v_slow.sdo
pingjie1\prj\simulation\modelsim\4dqpsk_8_1200mv_85c_slow.vo
pingjie1\prj\simulation\modelsim\4dqpsk_8_1200mv_85c_v_slow.sdo
pingjie1\prj\simulation\modelsim\4dqpsk_min_1200mv_0c_fast.vo
pingjie1\prj\simulation\modelsim\4dqpsk_min_1200mv_0c_v_fast.sdo

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