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文件名称:uart_test

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  • 上传时间:
    2017-11-20
  • 文件大小:
    15.56mb
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收发端都采用2M波特率发送串口数据,通过PIN口直接输入输出串口数据,目的是为了跟外围高速器件完成高速的串口数据的收发,普通USB转串口的都只能支持不到1M的波特率,内部采用乒乓FIFO进行时钟域切换以及缓存(The transmitter and receiver are used 2M baud rate serial data transmission, directly through the PIN port serial input and output data, the purpose is to complete the serial data with peripheral devices of high-speed high-speed transceiver, USB serial general can only support to 1M baud rate, internal use of table tennis for FIFO clock domain switching and cache)
(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
blk_mem_gen_v7_3.mif 500 2017-10-17
CDC.cdc 12401 2017-11-10
clkdiv_envsettings.html 14849 2015-01-27
clkdiv_summary.html 4090 2015-01-27
data_generator.cmd_log 268 2017-10-22
header_ram.coe 314 2015-11-10
impact.xsl 1477 2017-10-31
impact_impact.xwbt 259 2017-10-31
ipcore_dir
ipcore_dir\blk_mem_gen_v7_3
ipcore_dir\blk_mem_gen_v7_3.asy 530 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.gise 1396 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.mif 500 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.ngc 10337 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.sym 1559 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.v 5824 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.veo 4287 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.xco 3286 2017-10-17
ipcore_dir\blk_mem_gen_v7_3.xise 41095 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\blk_mem_gen_v7_3_readme.txt 7721 2013-10-14
ipcore_dir\blk_mem_gen_v7_3\doc
ipcore_dir\blk_mem_gen_v7_3\doc\blk_mem_gen_v7_3_vinfo.html 8311 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\doc\pg058-blk-mem-gen.pdf 7207569 2013-10-14
ipcore_dir\blk_mem_gen_v7_3\example_design
ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_exdes.ucf 2684 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_exdes.vhd 4818 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_exdes.xdc 2654 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_prod.vhd 10384 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\implement
ipcore_dir\blk_mem_gen_v7_3\implement\implement.bat 1104 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\implement\implement.sh 1087 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\implement\planAhead_ise.bat 2693 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\implement\planAhead_ise.sh 2588 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\implement\planAhead_ise.tcl 3215 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\implement\xst.prj 51 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\implement\xst.scr 241 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation
ipcore_dir\blk_mem_gen_v7_3\simulation\addr_gen.vhd 4526 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\blk_mem_gen_v7_3_synth.vhd 8211 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\blk_mem_gen_v7_3_tb.vhd 4504 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\bmg_stim_gen.vhd 7803 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\bmg_tb_pkg.vhd 6206 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\checker.vhd 5768 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\data_gen.vhd 5164 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simcmds.tcl 2719 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_isim.bat 3154 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_mti.bat 114 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_mti.do 3197 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_mti.sh 114 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_ncsim.sh 3183 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_vcs.sh 3033 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\ucli_commands.key 77 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\vcs_session.tcl 3593 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\wave_mti.do 1112 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\functional\wave_ncsim.sv 702 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\random.vhd 4220 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simcmds.tcl 2719 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_isim.bat 3070 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_mti.bat 114 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_mti.do 3222 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_mti.sh 114 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_ncsim.sh 3352 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_vcs.sh 2955 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\ucli_commands.key 77 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\vcs_session.tcl 3607 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\wave_mti.do 1112 2017-10-17
ipcore_dir\blk_mem_gen_v7_3\simulation\timing\wave_ncsim.sv 700 2017-10-17
ipcore_dir\blk_mem_gen_v7_3_flist.txt 2554 2017-10-17
ipcore_dir\blk_mem_gen_v7_3_xmdf.tcl 11938 2017-10-17
ipcore_dir\coregen.cgp 238 2017-10-30
ipcore_dir\create_ram_uart.tcl 1279 2017-10-30
ipcore_dir\create_rom_uart.tcl 1279 2017-10-30
ipcore_dir\create_vo.tcl 1323 2017-10-29
ipcore_dir\edit_icon.tcl 1120 2017-10-16
ipcore_dir\edit_ila.tcl 1119 2017-10-29
ipcore_dir\edit_pp_fifo_8_8.tcl 1127 2017-10-16
ipcore_dir\edit_ram_8x50.tcl 1124 2017-10-17
ipcore_dir\edit_ram_uart.tcl 1124 2017-10-30
ipcore_dir\edit_uart_pll.tcl 1124 2017-10-27
ipcore_dir\edit_vo.tcl 1118 2017-10-29
ipcore_dir\fifo_48_48_64.asy 889 2015-08-27
ipcore_dir\fifo_48_48_64.gise 1384 2017-10-24
ipcore_dir\fifo_48_48_64.ncf
ipcore_dir\fifo_48_48_64.ngc 75898 2015-08-27
ipcore_dir\fifo_48_48_64.sym 2437 2015-08-27
ipcore_dir\fifo_48_48_64.v 14194 2015-08-27
ipcore_dir\fifo_48_48_64.veo 4561 2015-08-27
ipcore_dir\fifo_48_48_64.xco 7309 2015-08-27
ipcore_dir\fifo_48_48_64.xise 4933 2015-08-28
ipcore_dir\fifo_48_48_64_flist.txt 2504 2015-08-27
ipcore_dir\fifo_48_48_64_xmdf.tcl 11877 2015-08-27
ipcore_dir\fifo_8_8_2048.asy 1078 2015-08-28
ipcore_dir\fifo_8_8_2048.gise 1384 2017-10-24
ipcore_dir\fifo_8_8_2048.ncf
ipcore_dir\fifo_8_8_2048.ngc 189416 2015-08-28
ipcore_dir\fifo_8_8_2048.sym 2915 2015-08-28
ipcore_dir\fifo_8_8_2048.v 14300 2015-08-28
ipcore_dir\fifo_8_8_2048.veo 4666 2015-08-28

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