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文件名称:Divider

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  • 上传时间:
    2017-12-29
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    101kb
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用Verilog HDL语言实现分频器,初学,简单(The realization of frequency divider in Verilog HDL,
Elementary learning is simple)
相关搜索: verilog实现分频器

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
Divider 0 2017-12-29
Divider\Divider.cache 0 2017-12-29
Divider\Divider.cache\compile_simlib 0 2017-12-29
Divider\Divider.cache\compile_simlib\activehdl 0 2017-11-20
Divider\Divider.cache\compile_simlib\ies 0 2017-11-20
Divider\Divider.cache\compile_simlib\modelsim 0 2017-11-20
Divider\Divider.cache\compile_simlib\questa 0 2017-11-20
Divider\Divider.cache\compile_simlib\riviera 0 2017-11-20
Divider\Divider.cache\compile_simlib\vcs 0 2017-11-20
Divider\Divider.cache\wt 0 2017-12-29
Divider\Divider.cache\wt\java_command_handlers.wdf 2014 2017-12-24
Divider\Divider.cache\wt\project.wpc 121 2017-12-24
Divider\Divider.cache\wt\synthesis.wdf 5243 2017-12-24
Divider\Divider.cache\wt\synthesis_details.wdf 100 2017-12-24
Divider\Divider.cache\wt\webtalk_pa.xml 3579 2017-12-24
Divider\Divider.hw 0 2017-12-29
Divider\Divider.hw\Divider.lpr 343 2017-11-20
Divider\Divider.hw\hw_1 0 2017-12-29
Divider\Divider.hw\hw_1\hw.xml 685 2017-11-20
Divider\Divider.hw\hw_1\wave 0 2017-11-20
Divider\Divider.hw\webtalk 0 2017-12-29
Divider\Divider.hw\webtalk\.xsim_webtallk.info 59 2017-12-24
Divider\Divider.hw\webtalk\labtool_webtalk.log 357 2017-12-24
Divider\Divider.hw\webtalk\usage_statistics_ext_labtool.html 2902 2017-12-24
Divider\Divider.hw\webtalk\usage_statistics_ext_labtool.xml 2468 2017-12-24
Divider\Divider.ip_user_files 0 2017-12-29
Divider\Divider.ip_user_files\README.txt 130 2017-11-20
Divider\Divider.runs 0 2017-12-29
Divider\Divider.runs\.jobs 0 2017-12-29
Divider\Divider.runs\.jobs\vrs_config_1.xml 201 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_2.xml 201 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_3.xml 215 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_4.xml 201 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_5.xml 201 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_6.xml 215 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_7.xml 201 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_8.xml 389 2017-11-20
Divider\Divider.runs\.jobs\vrs_config_9.xml 201 2017-12-24
Divider\Divider.runs\impl_1 0 2017-12-29
Divider\Divider.runs\impl_1\init_design.pb 1697 2017-11-20
Divider\Divider.runs\impl_1\opt_design.pb 5305 2017-11-20
Divider\Divider.runs\impl_1\place_design.pb 13551 2017-11-20
Divider\Divider.runs\impl_1\route_design.pb 8021 2017-11-20
Divider\Divider.runs\impl_1\write_bitstream.pb 3107 2017-11-20
Divider\Divider.runs\synth_1 0 2017-12-29
Divider\Divider.runs\synth_1\.vivado.begin.rst 185 2017-12-24
Divider\Divider.runs\synth_1\.vivado.end.rst 0 2017-12-24
Divider\Divider.runs\synth_1\.Vivado_Synthesis.queue.rst 0 2017-12-24
Divider\Divider.runs\synth_1\.Xil 0 2017-12-29
Divider\Divider.runs\synth_1\.Xil\Divider_propImpl.xdc 607 2017-12-24
Divider\Divider.runs\synth_1\Divider.dcp 7809 2017-12-24
Divider\Divider.runs\synth_1\Divider.tcl 1276 2017-12-24
Divider\Divider.runs\synth_1\Divider.vds 18037 2017-12-24
Divider\Divider.runs\synth_1\Divider_utilization_synth.pb 231 2017-12-24
Divider\Divider.runs\synth_1\Divider_utilization_synth.rpt 6843 2017-12-24
Divider\Divider.runs\synth_1\gen_run.xml 2034 2017-12-24
Divider\Divider.runs\synth_1\htr.txt 375 2017-12-24
Divider\Divider.runs\synth_1\ISEWrap.js 7308 2017-12-24
Divider\Divider.runs\synth_1\ISEWrap.sh 1720 2017-12-24
Divider\Divider.runs\synth_1\project.wdf 3644 2017-12-24
Divider\Divider.runs\synth_1\rundef.js 1255 2017-12-24
Divider\Divider.runs\synth_1\runme.bat 229 2017-12-24
Divider\Divider.runs\synth_1\runme.log 18039 2017-12-24
Divider\Divider.runs\synth_1\runme.sh 1110 2017-12-24
Divider\Divider.runs\synth_1\vivado.jou 641 2017-12-24
Divider\Divider.runs\synth_1\vivado.pb 29330 2017-12-24
Divider\Divider.sim 0 2017-12-29
Divider\Divider.sim\sim_1 0 2017-12-29
Divider\Divider.sim\sim_1\behav 0 2017-12-29
Divider\Divider.sim\sim_1\behav\compile.bat 233 2017-12-24
Divider\Divider.sim\sim_1\behav\compile.log 1018 2017-12-24
Divider\Divider.sim\sim_1\behav\Divider_tb.udo 285 2017-11-20
Divider\Divider.sim\sim_1\behav\Divider_tb_compile.do 810 2017-12-24
Divider\Divider.sim\sim_1\behav\Divider_tb_simulate.do 550 2017-12-24
Divider\Divider.sim\sim_1\behav\Divider_tb_wave.do 321 2017-12-24
Divider\Divider.sim\sim_1\behav\divide_tb.udo 284 2017-11-20
Divider\Divider.sim\sim_1\behav\glbl.v 1470 2016-06-02
Divider\Divider.sim\sim_1\behav\modelsim.ini 107250 2017-12-24
Divider\Divider.sim\sim_1\behav\msim 0 2017-12-29
Divider\Divider.sim\sim_1\behav\msim\xil_defaultlib 0 2017-12-29
Divider\Divider.sim\sim_1\behav\msim\xil_defaultlib\_info 1184 2017-12-24
Divider\Divider.sim\sim_1\behav\msim\xil_defaultlib\_lib.qdb 49152 2017-12-24
Divider\Divider.sim\sim_1\behav\msim\xil_defaultlib\_lib1_0.qdb 32768 2017-12-24
Divider\Divider.sim\sim_1\behav\msim\xil_defaultlib\_lib1_0.qpg 8192 2017-12-24
Divider\Divider.sim\sim_1\behav\msim\xil_defaultlib\_lib1_0.qtl 24040 2017-12-24
Divider\Divider.sim\sim_1\behav\msim\xil_defaultlib\_vmake 29 2017-12-24
Divider\Divider.sim\sim_1\behav\msim\_info 115 2017-12-24
Divider\Divider.sim\sim_1\behav\simulate.bat 233 2017-12-24
Divider\Divider.sim\sim_1\behav\simulate.log 547 2017-12-24
Divider\Divider.sim\sim_1\behav\vsim.wlf 49152 2017-12-24
Divider\Divider.sim\sim_1\behav\work 0 2017-12-29
Divider\Divider.sim\sim_1\behav\work\_info 115 2017-12-24
Divider\Divider.srcs 0 2017-12-29
Divider\Divider.srcs\constrs_1 0 2017-12-29
Divider\Divider.srcs\constrs_1\new 0 2017-12-29
Divider\Divider.srcs\constrs_1\new\Divider.xdc 295 2017-11-20
Divider\Divider.srcs\sources_1 0 2017-12-29
Divider\Divider.srcs\sources_1\new 0 2017-12-29
Divider\Divider.srcs\sources_1\new\Divider.v 435 2017-11-20
Divider\Divider.srcs\sources_1\new\Divider_tb.v 327 2017-11-20

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