设计一个序检测电路，功能是检测出串行输入数据Data中的4位二进制序列1101（自左至右输入），当检测到该序列时，输出Out为1；没有检测到该序列时，输出输出Out为0，要求：
（1）用状态机方法设计；
（2）用Verilog HDL语言设计，用Modelsim软件做功能仿真。(A sequence detection circuit is designed to detect the 4 bit binary sequence 1101 in the serial input data Data (from left to right). When the sequence is detected, the output Out is 1. When the sequence is not detected, the output Out is 0.
(1) design by state machine method;
(2) design with Verilog HDL language and use Modelsim software to do functional simulation.)