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文件名称:key_jitter_decade_counter_seg

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2018-04-16
  • 文件大小：
    63kb
  • 已下载：
    0次
  • 提 供 者：
    小明***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

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采用对抖动时间的记录，实现按键消抖，并记录按键个数(We use the recording of the jitter time to achieve the key dithering and record the number of keys.)
相关搜索： verilog fpga

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
key_jitter_decade_counter_seg 0 2017-03-28
key_jitter_decade_counter_seg\decade_counter.v 938 2017-03-28
key_jitter_decade_counter_seg\decade_counter.v.bak 850 2017-03-27
key_jitter_decade_counter_seg\key_jitter.v 779 2017-03-26
key_jitter_decade_counter_seg\key_jitter_decade_counter_seg.cr.mti 1788 2017-03-28
key_jitter_decade_counter_seg\key_jitter_decade_counter_seg.mpf 81230 2017-03-28
key_jitter_decade_counter_seg\key_jitter_decade_counter_seg_top.v 697 2017-03-28
key_jitter_decade_counter_seg\key_jitter_decade_counter_seg_top.v.bak 702 2017-03-28
key_jitter_decade_counter_seg\key_jitter_decade_counter_seg_top_tb.v 793 2017-03-28
key_jitter_decade_counter_seg\key_jitter_decade_counter_seg_top_tb.v.bak 767 2017-03-28
key_jitter_decade_counter_seg\seg_decode.v 1245 2017-03-27
key_jitter_decade_counter_seg\transcript 10736 2017-03-28
key_jitter_decade_counter_seg\vsim.wlf 131072 2017-03-28
key_jitter_decade_counter_seg\work 0 2017-03-28
key_jitter_decade_counter_seg\work\_info 2939 2017-03-28
key_jitter_decade_counter_seg\work\_temp 0 2017-03-28
key_jitter_decade_counter_seg\work\_temp\vlog1hdxna 526 2017-03-28
key_jitter_decade_counter_seg\work\_temp\vlogcbb6fh 521 2017-03-28
key_jitter_decade_counter_seg\work\_vmake 26 2017-03-28
key_jitter_decade_counter_seg\work\decade_counter 0 2017-03-28
key_jitter_decade_counter_seg\work\decade_counter\_primary.dat 712 2017-03-28
key_jitter_decade_counter_seg\work\decade_counter\_primary.dbs 758 2017-03-28
key_jitter_decade_counter_seg\work\decade_counter\_primary.vhd 314 2017-03-28
key_jitter_decade_counter_seg\work\decade_counter\verilog.asm 4200 2017-03-28
key_jitter_decade_counter_seg\work\decade_counter\verilog.rw 273 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter 0 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter\_primary.dat 599 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter\_primary.dbs 727 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter\_primary.vhd 507 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter\verilog.asm 5296 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter\verilog.rw 311 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top 0 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top\_primary.dat 793 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top\_primary.dbs 988 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top\_primary.vhd 395 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top\verilog.asm 5232 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top\verilog.rw 135 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top_tb 0 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top_tb\_primary.dat 799 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top_tb\_primary.dbs 1047 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top_tb\_primary.vhd 132 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top_tb\verilog.asm 7352 2017-03-28
key_jitter_decade_counter_seg\work\key_jitter_decade_counter_seg_top_tb\verilog.rw 609 2017-03-28
key_jitter_decade_counter_seg\work\seg_decode 0 2017-03-28
key_jitter_decade_counter_seg\work\seg_decode\_primary.dat 1439 2017-03-28
key_jitter_decade_counter_seg\work\seg_decode\_primary.dbs 1160 2017-03-28
key_jitter_decade_counter_seg\work\seg_decode\_primary.vhd 306 2017-03-28
key_jitter_decade_counter_seg\work\seg_decode\verilog.asm 6776 2017-03-28
key_jitter_decade_counter_seg\work\seg_decode\verilog.rw 342 2017-03-28

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