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文件名称:液晶显示驱动源程序代码

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  • 上传时间:
    2012-09-04
  • 文件大小:
    2.6mb
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液晶显示驱动源程序代码,所用芯片为ILI9325,用的是verilog 编写,Liquid crystal display driver source code, used by chips for ILI9325, prepared using a Verilog
(系统自动生成,下载前可以参看下载内容)

下载文件列表

2.83RD05_FPGA/db/add_sub_lkc.tdf
2.83RD05_FPGA/db/add_sub_mkc.tdf
2.83RD05_FPGA/db/altsyncram_1jv.tdf
2.83RD05_FPGA/db/altsyncram_csu.tdf
2.83RD05_FPGA/db/alt_u_div_a5f.tdf
2.83RD05_FPGA/db/alt_u_div_c5f.tdf
2.83RD05_FPGA/db/alt_u_div_i2f.tdf
2.83RD05_FPGA/db/alt_u_div_k2f.tdf
2.83RD05_FPGA/db/alt_u_div_k5f.tdf
2.83RD05_FPGA/db/lcd_283rb06.(0).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(0).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(1).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(1).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(10).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(10).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(11).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(11).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(12).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(12).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(13).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(13).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(14).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(14).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(15).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(15).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(16).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(16).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(17).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(17).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(18).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(18).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(19).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(19).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(2).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(2).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(20).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(20).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(21).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(21).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(22).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(22).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(23).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(23).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(24).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(24).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(25).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(25).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(26).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(26).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(27).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(27).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(28).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(28).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(29).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(29).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(3).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(3).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(30).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(30).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(31).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(31).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(32).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(32).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(33).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(33).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(34).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(34).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(4).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(4).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(5).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(5).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(6).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(6).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(7).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(7).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(8).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(8).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.(9).cnf.cdb
2.83RD05_FPGA/db/lcd_283rb06.(9).cnf.hdb
2.83RD05_FPGA/db/lcd_283rb06.asm.qmsg
2.83RD05_FPGA/db/lcd_283rb06.asm_labs.ddb
2.83RD05_FPGA/db/lcd_283rb06.cbx.xml
2.83RD05_FPGA/db/lcd_283rb06.cmp.bpm
2.83RD05_FPGA/db/lcd_283rb06.cmp.cdb
2.83RD05_FPGA/db/lcd_283rb06.cmp.ecobp
2.83RD05_FPGA/db/lcd_283rb06.cmp.hdb
2.83RD05_FPGA/db/lcd_283rb06.cmp.logdb
2.83RD05_FPGA/db/lcd_283rb06.cmp.rdb
2.83RD05_FPGA/db/lcd_283rb06.cmp.tdb
2.83RD05_FPGA/db/lcd_283rb06.cmp0.ddb
2.83RD05_FPGA/db/lcd_283rb06.cmp2.ddb
2.83RD05_FPGA/db/lcd_283rb06.cmp_bb.cdb
2.83RD05_FPGA/db/lcd_283rb06.cmp_bb.hdb
2.83RD05_FPGA/db/lcd_283rb06.cmp_bb.logdb
2.83RD05_FPGA/db/lcd_283rb06.cmp_bb.rcf
2.83RD05_FPGA/db/lcd_283rb06.dbp
2.83RD05_FPGA/db/lcd_283rb06.db_info
2.83RD05_FPGA/db/lcd_283rb06.eco.cdb
2.83RD05_FPGA/db/lcd_283rb06.eds_overflow
2.83RD05_FPGA/db/lcd_283rb06.fit.qmsg
2.83RD05_FPGA/db/lcd_283rb06.fnsim.hdb
2.83RD05_FPGA/db/lcd_283rb06.fnsim.qmsg
2.83RD05_FPGA/db/lcd_283rb06.hier_info
2.83RD05_FPGA/db/lcd_283rb06.hif
2.83RD05_FPGA/db/lcd_283rb06.map.bpm
2.83RD05_FPGA/db/lcd_283rb06.map.cdb
2.83RD05_FPGA/db/lcd_283rb06.map.ecobp
2.83RD05_FPGA/db/lcd_283rb06.map.hdb
2.83RD05_FPGA/db/lcd_283rb06.map.logdb
2.83RD05_FPGA/db/lcd_283rb06.map.qmsg
2.83RD05_FPGA/db/lcd_283rb06.map_bb.cdb
2.83RD05_FPGA/db/lcd_283rb06.map_bb.hdb
2.83RD05_FPGA/db/lcd_283rb06.map_bb.logdb
2.83RD05_FPGA/db/lcd_283rb06.pre_map.cdb
2.83RD05_FPGA/db/lcd_283rb06.pre_map.hdb
2.83RD05_FPGA/db/lcd_283rb06.psp
2.83RD05_FPGA/db/lcd_283rb06.pss
2.83RD05_FPGA/db/lcd_283rb06.rtlv.hdb
2.83RD05_FPGA/db/lcd_283rb06.rtlv_sg.cdb
2.83RD05_FPGA/db/lcd_283rb06.rtlv_sg_swap.cdb
2.83RD05_FPGA/db/lcd_283rb06.sgdiff.cdb
2.83RD05_FPGA/db/lcd_283rb06.sgdiff.hdb
2.83RD05_FPGA/db/lcd_283rb06.signalprobe.cdb
2.83RD05_FPGA/db/lcd_283rb06.sim.hdb
2.83RD05_FPGA/db/lcd_283rb06.sim.qmsg
2.83RD05_FPGA/db/lcd_283rb06.sim.rdb
2.83RD05_FPGA/db/lcd_283rb06.sim_ori.vwf
2.83RD05_FPGA/db/lcd_283rb06.sl

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