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文件名称:openmsp430_latest.tar

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    2012-11-07
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下载文件列表

./
./openmsp430/
./openmsp430/tags/
./openmsp430/branches/
./openmsp430/trunk/
./openmsp430/trunk/tools/
./openmsp430/trunk/tools/lib/
./openmsp430/trunk/tools/lib/tcl-lib/
./openmsp430/trunk/tools/lib/tcl-lib/dbg_uart.tcl
./openmsp430/trunk/tools/lib/tcl-lib/dbg_functions.tcl
./openmsp430/trunk/tools/lib/tcl-lib/combobox.tcl
./openmsp430/trunk/tools/freewrap642/
./openmsp430/trunk/tools/freewrap642/tclpip85s.dll
./openmsp430/trunk/tools/freewrap642/freewrapTCLSH.exe
./openmsp430/trunk/tools/freewrap642/freewrap.exe
./openmsp430/trunk/tools/freewrap642/generate_exec.bat
./openmsp430/trunk/tools/openmsp430-gdbproxy/
./openmsp430/trunk/tools/openmsp430-gdbproxy/openmsp430-gdbproxy.tcl
./openmsp430/trunk/tools/openmsp430-gdbproxy/server.tcl
./openmsp430/trunk/tools/openmsp430-gdbproxy/doc/
./openmsp430/trunk/tools/openmsp430-gdbproxy/doc/Howto-GDB_Remote_Serial_Protocol.pdf
./openmsp430/trunk/tools/openmsp430-gdbproxy/doc/ew_GDB_RSP.pdf
./openmsp430/trunk/tools/openmsp430-gdbproxy/commands.tcl
./openmsp430/trunk/tools/bin/
./openmsp430/trunk/tools/bin/openmsp430-gdbproxy.tcl
./openmsp430/trunk/tools/bin/openmsp430-minidebug.exe
./openmsp430/trunk/tools/bin/openmsp430-loader.tcl
./openmsp430/trunk/tools/bin/openmsp430-minidebug.tcl
./openmsp430/trunk/tools/bin/openmsp430-gdbproxy.exe
./openmsp430/trunk/tools/bin/openmsp430-loader.exe
./openmsp430/trunk/fpga/
./openmsp430/trunk/fpga/diligent_s3board/
./openmsp430/trunk/fpga/diligent_s3board/synthesis/
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/load_rom.sh
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/openMSP430_fpga_top.ucf
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/openMSP430_fpga_top.v
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/load_rom.bat
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/create_bitstream.sh
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/memory.bmm
./openmsp430/trunk/fpga/diligent_s3board/synthesis/xilinx/create_bitstream.bat
./openmsp430/trunk/fpga/diligent_s3board/software/
./openmsp430/trunk/fpga/diligent_s3board/software/leds/
./openmsp430/trunk/fpga/diligent_s3board/software/leds/7seg.c
./openmsp430/trunk/fpga/diligent_s3board/software/leds/makefile
./openmsp430/trunk/fpga/diligent_s3board/software/leds/7seg.h
./openmsp430/trunk/fpga/diligent_s3board/software/leds/main.c
./openmsp430/trunk/fpga/diligent_s3board/software/leds/hardware.h
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/README.txt
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/makefile
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/swuart.s
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/miniterm.py
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/swuart.h
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/fll.s
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/fll.h
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/main.c
./openmsp430/trunk/fpga/diligent_s3board/software/ta_uart/hardware.h
./openmsp430/trunk/fpga/diligent_s3board/bench/
./openmsp430/trunk/fpga/diligent_s3board/bench/verilog/
./openmsp430/trunk/fpga/diligent_s3board/bench/verilog/glbl.v
./openmsp430/trunk/fpga/diligent_s3board/bench/verilog/tb_openMSP430_fpga.v
./openmsp430/trunk/fpga/diligent_s3board/bench/verilog/registers.v
./openmsp430/trunk/fpga/diligent_s3board/bench/verilog/msp_debug.v
./openmsp430/trunk/fpga/diligent_s3board/doc/
./openmsp430/trunk/fpga/diligent_s3board/doc/xapp462.pdf
./openmsp430/trunk/fpga/diligent_s3board/doc/msp430f1121a.pdf
./openmsp430/trunk/fpga/diligent_s3board/doc/board_user_guide.pdf
./openmsp430/trunk/fpga/diligent_s3board/rtl/
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/driver_7segment.v
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/openMSP430_fpga.v
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/openMSP430_defines.v
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/timescale.v
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/io_mux.v
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/rom_8x2k_lo.asy
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/rom_8x2k_hi.xco
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/coregen.log
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/rom_8x2k_hi_xmdf.tcl
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/ram_8x512_hi.veo
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/rom_8x2k_hi.v
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/ram_8x512_lo.ngc
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/rom_8x2k_lo.ngc
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/ram_8x512_hi.asy
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/xlnx_auto_0_xdb/
./openmsp430/trunk/fpga/diligent_s3board/rtl/verilog/coregen/xlnx_auto_0_xdb/tmp/
./openmsp4

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