文件名称:disanci
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- 上传时间:2012-11-16
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文件大小:398.76kb
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已下载:1次
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5位的操作数X和Y输入后暂存在寄存器A和B中,两位的操作控制码control暂存在寄存器C中,按照control码的不同,分布实现下列操作:
00控制X+Y
01控制X-Y
10控制X and Y
11控制 X xor Y
运算结果暂存在寄存器D中,然后输出。
-5 of the operand X and Y after the temporary importation of A and B in the register, the two operational control code register C in temporary control, in accordance with the control code is different from the distribution of the realization of the following steps: 00 control X+ Y01 control of X- Y10 control X and Y11 control X xor Y computing the results of temporary storage in the register D, and then output.
00控制X+Y
01控制X-Y
10控制X and Y
11控制 X xor Y
运算结果暂存在寄存器D中,然后输出。
-5 of the operand X and Y after the temporary importation of A and B in the register, the two operational control code register C in temporary control, in accordance with the control code is different from the distribution of the realization of the following steps: 00 control X+ Y01 control of X- Y10 control X and Y11 control X xor Y computing the results of temporary storage in the register D, and then output.
相关搜索: x-hdl
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下载文件列表
disanci/asd.ant
disanci/asd.tbw
disanci/asd.vhw
disanci/asd.xwv
disanci/asd.xwv_bak
disanci/asd_bencher.prj
disanci/automake.log
disanci/disanci.dhp
disanci/disanci.ise
disanci/disanci.ise_ISE_Backup
disanci/isim/temp/hdllib.ref
disanci/isim/temp/hdpdeps.ref
disanci/isim/temp/sub00/vhpl00.vho
disanci/isim/temp/sub00/vhpl01.vho
disanci/isim/work/hdllib.ref
disanci/isim/work/hdpdeps.ref
disanci/isim/work/logic/behavioral.h
disanci/isim/work/logic/entity.cpp
disanci/isim/work/logic/entity.h
disanci/isim/work/logic/mingw/behavioral.obj
disanci/isim/work/qwe/entity.cpp
disanci/isim/work/qwe/entity.h
disanci/isim/work/qwe/mingw/testbench_arch.obj
disanci/isim/work/qwe/testbench_arch.h
disanci/isim/work/qwe/xsimtestbench_arch.cpp
disanci/isim/work/sub00/vhpl00.vho
disanci/isim/work/sub00/vhpl01.vho
disanci/isim/work/sub00/vhpl02.vho
disanci/isim/work/sub00/vhpl03.vho
disanci/isim/work/sub00/vhpl04.vho
disanci/isim/work/sub00/vhpl05.vho
disanci/isim/work/wave/entity.cpp
disanci/isim/work/wave/entity.h
disanci/isim/work/wave/testbench_arch.h
disanci/isim.cmd
disanci/isim.hdlsourcefiles
disanci/isim.tmp_save/_1
disanci/isimwavedata.xwv
disanci/logic.cmd_log
disanci/logic.isim_stx_prj
disanci/logic.isim_stx_sim
disanci/logic.lso
disanci/logic.ngr
disanci/logic.prj
disanci/logic.spl
disanci/logic.stx
disanci/logic.sym
disanci/logic.syr
disanci/logic.vhd
disanci/logic_ise6_bak.zip
disanci/logic_stx.prj
disanci/logic_summary.html
disanci/pepExtractor.prj
disanci/prjname.lso
disanci/qwe.ant
disanci/qwe.isim_beh_exe
disanci/qwe.isim_beh_log
disanci/qwe.isim_beh_prj
disanci/qwe.jhd
disanci/qwe.tbw
disanci/qwe.vhw
disanci/qwe.xwv
disanci/qwe.xwv_bak
disanci/qwe_beh.prj
disanci/qwe_bencher.prj
disanci/qwe_isim_beh.exe
disanci/transcript
disanci/WAVE.ant
disanci/WAVE.isim_beh_prj
disanci/WAVE.tbw
disanci/WAVE.vhw
disanci/WAVE.xwv
disanci/WAVE.xwv_bak
disanci/WAVE_beh.prj
disanci/WAVE_bencher.prj
disanci/xilinxsim.ini
disanci/xst/work/hdllib.ref
disanci/xst/work/hdpdeps.ref
disanci/xst/work/sub00/vhpl00.vho
disanci/xst/work/sub00/vhpl01.vho
disanci/__projnav/disanci.gfl
disanci/__projnav/disanci_flowplus.gfl
disanci/__projnav/logic.xst
disanci/__projnav/runXst_tcl.rsp
disanci/__projnav/sumrpt_tcl.rsp
disanci/__projnav/xst_sprjTOstx_tcl.rsp
disanci/__projnav.log
disanci/xst/dump.xst/logic.prj/ngx/notopt
disanci/xst/dump.xst/logic.prj/ngx/opt
disanci/isim/work/logic/mingw
disanci/isim/work/qwe/mingw
disanci/isim/work/wave/mingw
disanci/xst/dump.xst/logic.prj/ngx
disanci/isim/temp/sub00
disanci/isim/work/logic
disanci/isim/work/qwe
disanci/isim/work/sub00
disanci/isim/work/wave
disanci/xst/dump.xst/logic.prj
disanci/xst/work/sub00
disanci/isim/temp
disanci/isim/work
disanci/xst/dump.xst
disanci/xst/work
disanci/isim
disanci/isim.tmp_save
disanci/xst
disanci/_xmsgs
disanci/__projnav
disanci
disanci/asd.tbw
disanci/asd.vhw
disanci/asd.xwv
disanci/asd.xwv_bak
disanci/asd_bencher.prj
disanci/automake.log
disanci/disanci.dhp
disanci/disanci.ise
disanci/disanci.ise_ISE_Backup
disanci/isim/temp/hdllib.ref
disanci/isim/temp/hdpdeps.ref
disanci/isim/temp/sub00/vhpl00.vho
disanci/isim/temp/sub00/vhpl01.vho
disanci/isim/work/hdllib.ref
disanci/isim/work/hdpdeps.ref
disanci/isim/work/logic/behavioral.h
disanci/isim/work/logic/entity.cpp
disanci/isim/work/logic/entity.h
disanci/isim/work/logic/mingw/behavioral.obj
disanci/isim/work/qwe/entity.cpp
disanci/isim/work/qwe/entity.h
disanci/isim/work/qwe/mingw/testbench_arch.obj
disanci/isim/work/qwe/testbench_arch.h
disanci/isim/work/qwe/xsimtestbench_arch.cpp
disanci/isim/work/sub00/vhpl00.vho
disanci/isim/work/sub00/vhpl01.vho
disanci/isim/work/sub00/vhpl02.vho
disanci/isim/work/sub00/vhpl03.vho
disanci/isim/work/sub00/vhpl04.vho
disanci/isim/work/sub00/vhpl05.vho
disanci/isim/work/wave/entity.cpp
disanci/isim/work/wave/entity.h
disanci/isim/work/wave/testbench_arch.h
disanci/isim.cmd
disanci/isim.hdlsourcefiles
disanci/isim.tmp_save/_1
disanci/isimwavedata.xwv
disanci/logic.cmd_log
disanci/logic.isim_stx_prj
disanci/logic.isim_stx_sim
disanci/logic.lso
disanci/logic.ngr
disanci/logic.prj
disanci/logic.spl
disanci/logic.stx
disanci/logic.sym
disanci/logic.syr
disanci/logic.vhd
disanci/logic_ise6_bak.zip
disanci/logic_stx.prj
disanci/logic_summary.html
disanci/pepExtractor.prj
disanci/prjname.lso
disanci/qwe.ant
disanci/qwe.isim_beh_exe
disanci/qwe.isim_beh_log
disanci/qwe.isim_beh_prj
disanci/qwe.jhd
disanci/qwe.tbw
disanci/qwe.vhw
disanci/qwe.xwv
disanci/qwe.xwv_bak
disanci/qwe_beh.prj
disanci/qwe_bencher.prj
disanci/qwe_isim_beh.exe
disanci/transcript
disanci/WAVE.ant
disanci/WAVE.isim_beh_prj
disanci/WAVE.tbw
disanci/WAVE.vhw
disanci/WAVE.xwv
disanci/WAVE.xwv_bak
disanci/WAVE_beh.prj
disanci/WAVE_bencher.prj
disanci/xilinxsim.ini
disanci/xst/work/hdllib.ref
disanci/xst/work/hdpdeps.ref
disanci/xst/work/sub00/vhpl00.vho
disanci/xst/work/sub00/vhpl01.vho
disanci/__projnav/disanci.gfl
disanci/__projnav/disanci_flowplus.gfl
disanci/__projnav/logic.xst
disanci/__projnav/runXst_tcl.rsp
disanci/__projnav/sumrpt_tcl.rsp
disanci/__projnav/xst_sprjTOstx_tcl.rsp
disanci/__projnav.log
disanci/xst/dump.xst/logic.prj/ngx/notopt
disanci/xst/dump.xst/logic.prj/ngx/opt
disanci/isim/work/logic/mingw
disanci/isim/work/qwe/mingw
disanci/isim/work/wave/mingw
disanci/xst/dump.xst/logic.prj/ngx
disanci/isim/temp/sub00
disanci/isim/work/logic
disanci/isim/work/qwe
disanci/isim/work/sub00
disanci/isim/work/wave
disanci/xst/dump.xst/logic.prj
disanci/xst/work/sub00
disanci/isim/temp
disanci/isim/work
disanci/xst/dump.xst
disanci/xst/work
disanci/isim
disanci/isim.tmp_save
disanci/xst
disanci/_xmsgs
disanci/__projnav
disanci
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