This file provides an 8051 external data memory bus interface

for CoolRunner CPLDs. This file contains the state machine to

interface on the 8051 bus as well as the address registers, the address

decode logic, and example control registers, status registers, data input

registers, and data output registers. Interrupt logic is also included.



Note that this code should be modified to meet the requirements of the

system.

-This file provides an 8051 external data memory bus interface　　　　　　

for CoolRunner CPLDs. This file contains the state machine to　　　　　　

interface on the 8051 bus as well as the address registers, the address　

decode logic, and example control registers, status registers, data input

registers, and data output registers. Interrupt logic is also included.　

　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　

Note that this code should be modified to meet the requirements of the　　

system.