搜索资源列表
SRAM_RWtest
- SRAM_RWtest sram 用8051f020开发的读写测试程序
TOOLS FOR SST89X5X
- 新型增强型的SST 51单片机的开发工具和资料,包括在线仿真功能,在线编程下载功能,内部FLASH和SRAM的读写源程序,是51单片机开发工程师的第4代开发利器.-new enhanced the SST 51 MCU development tools and information, including online simulation, the ability to download online programming, internal FLASH and SRAM source l
FIFO_SRAM
- 可用于FIFO功能的SRAM读写器.....绝对好用-SRAM FIFO function can be used ..... definitely helps the reader ...
LM3SLib_GPIO_Parallel-Bus
- LM3S系列ARM用GPIO模拟并行总线扩展32KB SRAM PF0～PF7 D0～D7（数据总线） PA0～PA7 A0～A7（地址总线低8位） PB0～PB7 A8～A15（地址总线高8位） PB7 /CE（片选） PC4 /WE（写使能） PC5 /OE（读使能） 32KB SRAM 映射在地址0x0000～0x4FFF之间 为了加快访问速度，软件上将采用寄存器方式进行操作 PB7原为/TRST功能，现在也解放出来作为地址线A15-ARM
verilogsram
- FPGA开发板上的VerilogHDL编写的SRAM读写试验程序, 包括介绍文档, Verilog源码, 在Quartus II 8.1环境下测试通过-FPGA development board SRAM VerilogHDL prepared to read and write test procedures, including the descr iption document, Verilog source code, the Quartus II 8.1 environment te
DDR_FLASH_VHDL_Verilog
- FPGA DDR 外部RAM 读写的verilog代码，以及FLASH的vhdl代码-DDR SRAM READ AND WRITE VERILOG CODE ,FLASH VHDL CODE ,FPGA
iicfram
- 全新的铁电存储器的操作代码.铁电存储器是近几年开发出来的掉电保持存储器,具有SRAM的快速读写和EEPROM的保持特性,做工控,完全可替换EEPROM-New ferroelectric memory operation code. Ferroelectric memory is developed in recent years to maintain the power-down memory, SRAM has fast read and write and to maintain the
AT45DB081B
- 它的 8Mbit 存储体以页的形式组织,共有4 096 页,每页 包括264 个字节。除了主存储体外,它还有两个大 小为264 字节的SRAM 数据缓冲器。这两个缓冲 页使得同时读写数据成为可能。利用Atmel Flash 存储器的特性可以改进系统的性能,简化硬件和软 件的开发。-AY45DB081B
add_tree
- 本程序为加法树乘法器，计算16位读写地址，应用于LCD CSTN驱动芯片设计的SRAM的读写控制-This procedure for the adder tree multiplier, calculated 16-bit read and write address, used in LCD CSTN driver IC designed to control the SRAM s read and write
USBmass
- 基于8位单片机驱动SL811的U盘读写源代码，编译环境Keil for C51.运行于AT89C51，需外挂32K SRAM-Based on 8-bit MCU-driven SL811 U-disk read-write source code, build environment Keil for C51. Running on the AT89C51, take plug-in 32K SRAM
ATmega128
- ATmega128读写外部SRAM，FM1808-ATmega128 SRAM FM1808
basic-serialflash-project-at91sam9261-ek-keil
- AT91SAM9261读写dataflash，AT91SAM9261会在执行rom里面的代码时检测dataflash是否有有效的代码，如果有则拷贝到sram运行-AT91SAM9261 read and write dataflash, AT91SAM9261 in the implementation of the rom inside the code, whether there is a valid test dataflash code, if there is then copied
iic_communication
- 实现IIC通信,通过一段式有限状态机实现对SRAM的读写时序,清晰易懂.-this code is very easy to understand
ram
- 实现了对于SRAM的读写控制输入和输出，能够连续的进行读写操作以及能够对各种四则运算的嵌入-Achieved for the SRAM read and write control input and output, can continuous operation and can read and write all four of embedded computing
ramtest
- 用verilog语言往内部FPGA的sram中读写数据，即把1—4写入ram的1—4的地址里-Verilog language within the FPGA with the sram to read and write data, that is 1-4, 1-4 to write the address in ram
SRAMreadwritetest
- 这是用verilog开发的外部SRAM测试程序，编写了SRAM的读和写，当读写值相同则点亮LED。在实际测试中检测是正确的。对调试SRAM的朋友有一定的参考价值-It is the development of the external SRAM with verilog test procedures, preparation of SRAM read and write, read and write the same value when the light LED. In the act
SRAM_WR
- 实现对SRAM的读写。具体功能：在DE2开发板上通过键盘SW0-SW3输入数据存入SRAM中，同时LEDR0=LEDR3显示输入数据；SW17控制SRAM的输入与读出，LEDR4-LEDR7显示读出结果。-To achieve the SRAM read and write. Specific features: In the DE2 development board via the keyboard SW0-SW3 input data into the SRAM, while LEDR0
pci9054
- PCI读写控制程序 PCI9054与SRAM连接-PCI9054 PCI read and write control procedures connected with the SRAM
SD2068Amarket1.4
- SD2068 是一种具有标准IIC 接口的实时时钟芯片,CPU 可使用该接口通过5 位地址寻址来读写片内32 字节寄存器的数据(包括时间寄存器、报警寄存器、控制寄存器、通用SRAM 寄存器)。-SD2068 is a standard IIC interface with real-time clock chip, CPU can use the interface addressing the 5-bit address to read and write on-chip 32-byte re
verilogsram
- 用FPGA实现SRAM读写控制的Verilog代码-SRAM FPGA implementation using Verilog code to read and write control