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Zed_vga_hdmi_720p
- 开发板zedboard上的hdmi的显示，采用开发工具ise，熟悉ideo的时序，推荐给大家-Hdmi display board zedboard on using development tools ise, familiar ideo timing and recommend it to everyone
OLED_on_ZedBoard-master
- 开发板zedboard上的OLED的控制，采用开发工具ise，熟悉OLED的工作原理，推荐给大家-Control board zedboard on OLED development, the use of development tools ise, familiar OLED works, recommend it to everyone
fir_digital
- 本文对数字基带信号脉冲成型滤波的应用、原理及实现进行了研究。首先介绍了数字成型滤波的应用意义并分析了模拟和数字两种硬件实现方法，接着介绍了成形滤波器设计所需要MATLAB软件，以及利用ISE system generator在FPGA上进行滤波器实现的优势。文中给出了成形滤波函数的数学模型，讨论了几种常用成形滤波函数的传输特性以及对传输系统信号误码率的影响。然后介绍了本次设计中使用到的数字成形滤波器设计的几种FIR滤波器结构。把各种设计方案进行仿真，比较仿真结果，最后根据实际应用的情况并结合
Micrium_Microblaze_uCOS-II-AXI
- 支持xilinx ise designer 14.x的microblaze AXI总线 ucosii操作系统。-Support xilinx ise designer 14.x for microblaze AXI bus ucosii operating system
uart
- 基于VHDL和ISE平台编写的UART设计。其中包括了接收，发送，波特产色器，顶层v文件，和相关的测试v文件。代码有注释，仿真成功，可直接利用测试文件测试。还附带uart课程设计报告。-ISE platform written in VHDL and UART design. Including receiving, sending, Porter produced color picker, the top v files, and the associated test v file. Co
filter_2d
- XILINX ISE FILE FOR FPGA IMPLIMENTATION OF 2D FIR FILTER USING MODIDIED BOOTH ALGORITHM
GTX_AURORA_MAIN
- 将数据从板卡网口(Ethernet Mac)经过fifo发至GTX高速串行口 ISE -The data from the network interface card (Ethernet Mac) through fifo GTX sent to high-speed serial port ISE
EMAC_T_GTH
- fpga GTH ISE 数据从板卡网口输入从高速串行收发器（GTH）发出-fpga GTH ISE data input sent from the high-speed serial transceivers (GTH) from the network interface card
GTX_pcie_circle
- ise v6开发板 外部pcei连接线 用GTX收发器实现自环回收发 可以用chipscpoe查看数据-ise v6 development board outside pcei cable with GTX transceivers to achieve self-loop recycling hair can be used to view data chipscpoe
fpga_UART
- 在ISE virtex6 开发板上测试成功的串口收发程序 可用chipscope查看数据 并且包含仿真测试程序-In ISE virtex6 development board test successful serial transceiver can be used to view the data and contains chipscope simulation test program
XILINX_MAN
- xilinx ise user manual
inv_matrix
- 矩阵求逆模块硬件实现,用verilog语言，基于ISE开发环境-implement of inverse matrix
abcc_22
- This paper deals with the various aspects of AGC of interconnected multi-area hydrothermal systems. Thermal area is considered with reheat turbine and hydro area is considered either with an electric governor or a mechanical governor. Optimiza
endun-files-to-upload
- This paper deals with the various aspects of AGC of interconnected multi-area hydrothermal systems. Thermal area is considered with reheat turbine and hydro area is considered either with an electric governor or a mechanical governor. Optimiza
entrn1
- This paper deals with the various aspects of AGC of interconnected multi-area hydrothermal systems. Thermal area is considered with reheat turbine and hydro area is considered either with an electric governor or a mechanical governor. Optimiza
trp_212
- This paper deals with the various aspects of AGC of interconnected multi-area hydrothermal systems. Thermal area is considered with reheat turbine and hydro area is considered either with an electric governor or a mechanical governor. Optimiza
cordic
- cordic代码 verilog语言 产生三角波 适用在ISE上面-cordic code verilog language triangular wave generated above apply at ISE
9
- 针对传统的空间域纹理图像修复算法计算量大、修复时间长的缺点, 本文提出了一种纹理图像的快速修复算法。该算 法的基本思想是在小波域中利用小波系数的能量来确定待修复块的填充顺序, 并结合纹理合成的方法填充待修复区。实验结 果表明, 该算法不仅可以大大提高纹理图像的修复速度, 而且在峰值信噪比和主观视觉效果上都优于传统的图像修复算-Trad itional spatia-l doma in inpainting algorithm s for tex ture image need comp
turbo_encode
- turbo码的编码程序,verilog HDL,在ISE环境中-turbo code encoding process
Lab3_mux24a
- 4位2选1多路选择器的设计与实现。nexy3开发板。本实验中用Verilog语句来描述。-Xilinx ISE 12.3.nexy3.