搜索资源列表
recognition
- 语音识别的源码可用于语音识别。。。。。语音识别 的源码可用于语音识别-Speech recognition source code can be used for speech recognition. . . . . Speech recognition source code can be used for speech recognition
7
- 单片机源码，实现按键时间计时兵得出平均时间。富电路图和源码-Single-chip source, time to achieve key time soldiers come to the average amount of time. Fu schematics and source code
s6_unjounce
- xilinx3s400开发板厂家光盘源码。按键防抖动-xilinx3s400 source development board CD-ROM manufacturers. Button防抖动
seven
- 这是我在ISP编程实验中独立编写的采用结构化描述的一个七人表决器，通过独特的3次映射一位全加器的方法从而实现七人表决器的功能，与网络上任何其他的七人表决器源码决无雷同。-This is my ISP programming in an independent experiment using a structured, prepared as described in a seven-member voting machine, through a unique 3 times a full a
UTOPIA
- utopia接口模块VHDL源码,实现UTOPIA接口功能,可进行UTOPIA接口仿真-utopia interface module VHDL source code to achieve UTOPIA interface functions can be carried out UTOPIA Interface Simulation
mini_fifo
- 另外一个用VHDL源码编写的FIFO模块程序,可以比较一下和FIFO有什么区别.-Another, prepared by using VHDL source FIFO module procedures, you can compare and What is the difference between FIFO.
xapp348
- spi源码，是verliog的，有需要的可依参考进行设计自己的工程，后续有需要还有一个使用说明附上-spi-source is the verliog, reference may need to design their own projects, there is a need to have a follow-up instructions attached
xp2demo
- lattice xp2 系列开发板带源码，有需要的可依进行设计参考！-lattice xp2 Series development board with source code, need-based reference design!
vga_timing
- 此乃VGA驱动的详细源码，并配有PLL。使用Quartus II 开发。-This is a detailed source VGA driver with a PLL. Use Quartus II development.
ENCODE
- 本源码实现交织编码，源码为VHDL语言。运行于发射端FPGA。-Interleaved Coded achieve this source, source code for VHDL language. Running on the transmitter FPGA.
IMDCT
- 主要是进行IMDCT变换的源码，供大家参考使用，希望能得到大家的认可。-Mainly IMDCT transform source for your use, we hope to be recognized.
dct
- 主要是进行DCT变换的源码，供大家参考希望能得到大家的认可。-Mainly DCT transform source for your information we hope to be recognized.
sin.tar
- 神奇的sin波生成verilog源码，非常简单的代码无需乘法即可生成sin,cos，值得搞算法的人借鉴-Magic sin wave generated Verilog source code, the code is very simple multiplication can be generated without sin, cos, worthy people from engaging in algorithm
8086IP
- 开源CPU软核8086的源码,波兰版Verilog源码-8086 soft-core CPU revenue source, the Polish version of Verilog source code
Quartus2_VerilogRoutine
- 该文档是基于QUARTUS2_6.0的Verilog试验例程，其中附有工程源码，对于初学者是最好的例程！它是本人花费一年多自学后写的例程，以便初学者入门，里面附有很多图解，很详细！-The document is based on the Verilog test QUARTUS2_6.0 routines, including an engineering source code, for beginners is the best routine! It is, I spent more
ModelSim_example
- modelsim仿真流程，附有两个源码（vhdl),做设计例子，按步骤操作并添加源码，即可看到仿真波形输出-ModelSim simulation process, with the two source code (vhdl), to do a design example, according to these steps and add the source, you can see the simulation waveform output
DW8051_HDL
- DW8051 Verilog VHDL 源码和文档 -DW8051 Verilog VHDL Code and document
rs-codec-8-16
- RS[255,223]纠错码verilog源码，包含编码和解码模块，以及testbench等。-Verilog source code for RS[255,223] encoder and decoder, with testbench included.
sd_card
- 在开发FPGA上比较有用，主要关于SD CARD的源码-FPGA in the development of more useful, the main source of about SD CARD
QPSK_VHDL
- VHDL语言的QPSK调制示范源码。很有参考价值-VHDL language QPSK modulation source model. Useful reference