搜索资源列表
risc
- RISC(reduced instruction setcomputer,精简指令集计算机)是一种执行较少类型计算机指令的微处理器。改源码是vhdl语言,能在FPGA上跑。-RISC [reduced instruction setcomputer, Reduced Instruction Set Computer] is an implementation of fewer types of computer instructions to the microprocessor. VHDL s
ICX408AL7.5M
- 基于CPLD的CCD驱动程序源码,本人已经测试过,配合单片机控制,就能实现CPLD对CCD的驱动控制和曝光控制-CPLD based on the CCD driver source, I have been tested with single-chip control, you can achieve CPLD driver for CCD control and exposure control
frenquenter
- 等精度频率计设计与文档,有源码,doc格式-Precision frequency meter, etc. The design and documentation, has source code, doc format
QuartusII
- 在quartus2中实现过的VHDL源码。已经试用过。-Medium quartus2 at implementation of the VHDL source code too. Have tried them already.
IP_CORES
- IC内核的设计源码!其中包含MP3内核,CPU内核,I2C内核等多达式种IC设计的源码!-IC design of the kernel source code! MP3 contains one of the kernel, CPU core, I2C kernel up-type species such as IC design source!
1234
- 一段NOR FLASH 控制器的Verilog源码-Verilog
fifo_core
- 经典的FIFO实现源码,里面有三种类型,是xilinx工程师写的,经典-Classic source FIFO implementation, there are three types, are written by xilinx Engineer, classical
IIC_AD75
- I2C温度传感器ADT75的控制源码 使用verilog 状态机实现 易入门-I2C for ADT75 temperature sensor
lai_PWM
- FPGA下PWM的Verilog 源码,含目标程序,可直接下载使用,可用在电机控制中-FPGA in Verilog source code under the PWM, including the target program, can be directly downloaded to use, can be used in motor control in
logicFPGA
- 电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖)-Electronic Design Competition works _ audio signal source analyzer FPGA (first prize)
GF_MUL
- Galois域乘法器的Verilog源码 广泛用于信道编码、计算机代数及椭圆曲线加密等-Galois field multipliers are widely used in the Verilog source channel coding, computer algebra and elliptic curve encryption
add
- 一位全加器源码实现了MAX及其一系列器件实现全加的功能-A full adder and its source code to achieve the MAX series of devices to achieve the functions of the All-Canadian
LCD
- 用VHDL实现LCD的驱动电路的设计的源码-VHDL to achieve with the design of LCD source drivers, who are interested can look at the
FFT
- FFT高速傅立叶变换 VHDL完整源码 文档密码:www.armjishu.com 更多资料下载,欢迎登陆网站 www.armjishu.com
vhdl
- 常用集成器件源码,主要为74系列源码,用vhdl编写-Integrated device commonly used source, the main source for the 74 series with the preparation of vhdl
Linux_bc
- 对vga接口做了详细的介绍,并且有一 ·三段式Verilog的IDE程序,但只有DMA ·电子密码锁,基于fpga实现,密码正 ·IIR、FIR、FFT各模块程序设计例程, ·基于逻辑工具的以太网开发,基于逻 ·自己写的一个测温元件(ds18b20)的 ·光纤通信中的SDH数据帧解析及提取的 ·VHDL Programming by Example(McGr ·这是CAN总线控制器的IP核,源码是由 ·FPGA设计的SDRAM控制器,有仿真代码 ·xili
8-bit-Multiplier
- 一种基于加法器树方法的8为乘法器的VHDL源码,该方法虽然相对占有资源多,但仿真快-VHDLSourceProgramof8-bit-Multiplier
CPU
- 实现简单CPU功能的源码,可以实现加减乘除和移位功能,VHDL代码,程序运行在MAX PULS和Quartua上。-The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus Ⅱ EDA tool is recommended
H264
- h.264(verilog HDL) 这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code
VHDL
- VHDL代码集锦 VHDL常用的22个子程序源码-VHDL Collection VHDL code of the 22 sub-procedures commonly used source