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alu
- this the vhdl code for the arithmetic logic unit.enjoy! -this is the vhdl code for the arithmetic logic unit.enjoy!
alu64
- design and impliment alu 64 bit in vhdl
pr_step7-(1).vhdl
- 8位alu 附上testbench以供仿真-8 alu attach testbench for simulation
sn74181
- 运算alu的设计,并附上运算器的代码检测，简单的描述运算器的作用-Computing alu design
alu
- 可以实现十六种算术运算和逻辑运算的VHDL代码哦，ISE上编译仿真可以运行-Can achieve sixteen kinds of arithmetic and logic operations of the VHDL code Oh, ISE compiled simulation can be run on
cpu
- 16位实验CPU设计——设计16位的ALU，实现9种运算：逻辑运算（与、或、非、异或）4种、算术运算（加、减、自加、自减）4种以及传送操作1种；-16 Experimental CPU design
logisim-win-2.7.1
- logicsim源代码，能进行数字逻辑仿真、ALU设计等功能-logicsim source code, can perform digital logic simulation, ALU design features
alu_sequence_detector_1101
- It is verilog based implementation of ALU and sequence detector for detecting sequence 1101
alu1
- 本文是基于vhdl的8位cpu ip core设计alu-This article is based on the 8 vhdl cpu ip core design alu
cluster
- ALU Cluster using VERILOG.
alu
- A vhdl code for CPU unit with pipeling.It performs all basic operations like ADD,SUB,Shift
or1200_alu
- 该代码为OR1200 CPU中ALU部件，在ISE中综合成功，希望能为对HDL感兴趣的朋友提供帮助。-The code for the OR1200 CPU in ALU components in a comprehensive success in the ISE, hoping to interest in HDL as a friend to help.
lib7
- ALU运算器的设计。将算术逻辑单元与寄存器组集成-ALU arithmetic unit design. The arithmetic logic unit and the register set of integrated
1.6ALU-Behavioral
- behavior方式的简单ALU 实现了以下功能：all operations are combinational ADD/SUB on N bits operands MULTIPLY on N/2 bits operands (Least Significant Part of), result on N bits. bitwise AND, OR, XOR on 32 bits operands. Logical Shift Left, Right, Rot
alu_sequence_detector_1101
- It is verilog based implementation of ALU and sequence detector for detecting sequence 1101
datapath
- 单片机PIC16C5X的datapath代码，包括ALU,alu_mux,w_reg和各个指令的代码-The datapath PIC16C5X microcontroller code, including ALU, alu_mux, w_reg and each instruction code
day8_alu_design
- this verilog code for designing ALU in fpga.-this is verilog code for designing ALU in fpga.
16weiALU
- VHDL代码编写的一个16位ALU运算器-VHDL code written in a 16-bit ALU arithmetic
ALU_finished
- 8bit四级流水ALU 其中有乘法器除法器加法器减法器开方 移位逻辑运算等等通过顶层来控制选择输出需要的运算值-8bit four water which has a multiplier divider ALU adder subtracter prescribing controlled shift logic operations so operators need to select the output value by the top
proje
- its ALU using VHDL. its parameter have 16 bits and doing logical and arithmetic functions