搜索资源列表
AD7865
- verilog HDL语言编写的16位AD采样程序，包含源码和测试文件，已通过测试-verilog HDL language 16 AD sampling procedures, including source code and test files, has been tested
sdram_epm570_uart
- 基于CPLD芯片EPM570的verilog hdl串口程序-the UART verilog hdl code based on CPLD chip-- EPM570
LCD_test
- (1)verilog Hdl语言学习。（2）1602LCD的verilog程序。-(1) verilog Hdl language learning. (2) 1602LCD the verilog program.
18.uart
- 用Verilog HDL编写的uart程序，亲测可行，注释很详细！-Written using Verilog HDL uart program, pro-test is feasible, very detailed notes!
FPGA_CRC
- 用Quartus II 13.0 (32-bit)实现并行计算8位数据宽度的CRC16-CCITT循环冗余码，verilog HDL源代码，并有本人手工计算的原理。本程序已经过ModelSim-Altera模拟，仿真波形文件都在本文件内。-Calculated using the Quartus II 13.0 (32-bit) parallel 8-bit data width CRC16-CCITT cyclic redundancy code, verilog HDL source cod
DDS
- 用Verilog HDL 编写的一个最基本的DDS程序，发生正弦波-Verilog HDL prepared with a basic DDS program, the occurrence of a sine wave
DDS
- Verilog HDL实现FPGA的DDS功能，含有实验原理与代码程序-FPGA Verilog HDL realize the DDS function, principles and codes containing experimental procedures
verilogHDL
- 自己写的一些Verilog HDL小程序，来自课本的例程-Verilog HDL himself wrote some small programs, routines from textbooks
UART
- Verilog HDL编写的串口程序实例，很详细好用的参考代码。针对Xilinx FPGA开发板，在Xilinx ISE编译调试成功，串口开发的经典例程。-Verilog HDL serial program written examples, very good reference code in detail. In view of the Xilinx FPGA development board, in Xilinx ISE compiler debugging success, a s
led-and-digital-synchronous-beating
- verilog HDL语言程序，可以控制led和数码管同步跳动-verilog HDL language program, you can control led and digital synchronous beating
PLL
- 用Verilog HDL编写的锁相环程序-Phase-locked loop program written in Verilog HDL
TLC1650
- TLC1650驱动程序 Verilog HDL-TLC1650driver Verilog HDL
test
- 8B/10B编码程序，注解比较详细的，verilog hdl语言。-8B/10B encoding process, more detailed notes, verilog hdl language.
CH376
- 用VERILOG HDL语言写的usb程序。FPGA芯片用的是ALTERA公司的，编程所用的软件为quartus和nios，USB芯片为CH376.-VERILOG HDL language written with usb program. ALTERA FPGA chip using the company s software program used quartus and nios, USB chip CH376.
squre_generate
- 该程序使用Verolog HDL 语言编写，是一个使用DDS原理产生方波的程序，该程序还提供三个按键来改变频率。-This program is developed by Verilog HDL, and is used to generate a squre waveform of any frequancy. This program provide three buttons to change the frequency.
iic_100k
- 用verilog HDL语言描述的i2C总线程序-a iic_100k program using a verilog HDL
fifo_pipeline_booth_multiplier
- fifo_pipeline_modified_booth_multiplier一个使用FIFO的Booth乘法器，并且使用了流水线描述方式，本程序给予verilog 语言-fifo_pipeline_modified_booth_multiplier, a booth multiplier using pipeline technology in verilog HDL language
pipeline_lut_multiplier
- pipeline_lut_multiplier, 一个使用查找表实现的流水线乘法器，本程序使用verilog HDL language 语言编写-pipeline_lut_multiplier ，a multiplier based on look up tablets ,and it is programing in verilog language
ir
- 这是一个红外遥控程序，可以遥控LED灯，数码管。语言verilog hdl-This is an infrared remote control program that can be remotely controlled LED lights, digital control. Language verilog hdl
uart
- 用Verilog HDL，实现的FPGA串口调试程序，已经在硬件上调试成功-With Verilog HDL, FPGA serial debugger implemented in hardware debugging has been successful