搜索资源列表
QuartusII
- 概述了可编程逻辑设计中Quartus II 软件的功能。解释软件的功能以及这些功能如何帮 助您进行 FPGA 和 CPLD 设计。-It introduces the funcion of the Quartus II software.
E-Play-SOPC
- 1、软件使用 1）软件安装 2）简单设计的完整过程演示 2、FPGA核心板原理及资源介绍 3、E-PLAY扩展板HD7279占用I/O说明 E-PLAY扩展板LCD 128X32 & KEY 8占用I/O说明 4、Quartus II工程应用模块说明 -1, software 1) Software Installation 2) the integrity of the design process simple demo 2, FPGA core plate
VHDLchengxu
- VHDL语言的实例，编译通过，使用QUARTUS软件-examples of VHDL language using QUARTUS
speed_measure_on_7_segment
- Period method of frequency measuring (change constant to speed measure). DE2 Board Quartus project. Input signal on GPIO, result on 7seg, start/stop with key[0].
Quartus2(FPGACPLD)
- 在Quartus2上的FPGACPLD设计，PDF文档-The FPGACPLD design in Quartus2 , PDF documents
1
- 实现按键中断，在NIOS II IDE平台上实现按键中断，按键驱动程序在Quartus ii里面用VHDL编写。-interrupt
yuandaima
- FPGA多功能数字钟，描述语言VHDL，软件环境QuartusⅡ-FPGA multi-function digital clock, descr iption language VHDL, Quartus Ⅱ software environment
uart_read_send
- uart自收发的vhdl实现,包括quartus工程文件及modelsim仿真工程文件(调试通过)-uart vhdl from the transceiver to achieve, including the quartus project file and modelsim simulation project file (debugged)
LCD_DISPLAY
- lcd显示的VHDL实验,包括quartus工程文件及modelsim仿真文件-lcd display VHDL experiments, including the quartus project file and modelsim simulation file
lcd_1602_v
- 在quartus环境下，通过verilog 语言实现lcd1602 显示的程序-In quartus environment, through the verilog language lcd1602 display program
PS_2_v
- 在quartus 2 环境下，通过VHDL语言实现PS_2口的编程，并且编译成功。-In quartus 2 environment, through the mouth of VHDL programming language PS_2 and compiled successfully.
key_led_v
- 在quartus 2 环境下，基于verilog 语言实现按键_LED亮灭功能，并且编译通过，适合初学者。-In quartus 2 environment, based on verilog language button _LED light off function, and compile, for beginners.
quartus6.0
- 非常全面的QUARTUS，希望对您有所帮助-Very comprehensive QUARTUS, hope for your help
usb-blaster
- altera quartusII usb byteblaster转接板原理图以及相应源码-altera quartusII usb byteblaster adapter board schematic and the corresponding source
m-mtip-10_100_1000_ethermac
- 10/100 0M以太网MAC解决方案，是IP核的相关说明，利用ALTERA的FPGA设计，QUARTUS软件为开发平台。-10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform.
dma_hussam
- verilog code for dma
fsk
- vhdl语言实现信号的fsk调制和解调。用 Quartus软件仿真-vhdl language signals fsk modulation and demodulation. Software simulation using Quartus
DE2_70_CAMERA_V1.0.3
- terasic 5mp camera also quartus 9.1 support
yao
- 使用Quartus II软件实现电路功能，熟悉VHDL语言设计。-Circuit using Quartus II software features, familiar with the VHDL language design.
bujindianjikongzhi
- 在quartus II下用verilog编写的步进电机位置控制程序，其中包含7个子模块和1个顶层模块，本程序层次清晰、功能明确。乃个人收藏，推荐大家下载学习！-Verilog in quartus II, prepared under the stepper motor with position control program, which contains seven sub-modules, and a top-level module, the program-level clarity