搜索资源列表
SDRAM_VHDL
- VHDL SDRAM Controller
sdram
- 用verilog语言编程实现的SDRAM模块，可用于配置在FPGA中-Verilog language programming with the SDRAM module, can be used to configure the FPGA,
Sdram_Control_2Port
- 双端口SDRAM控制器，将SDRAM虚拟成两个端口，已经在ALTER DE2开发板的硬件上验证通过，采用Verilog HDL语言编写。-Dual-port SDRAM controller, SDRAM virtual into two ports, have ALTER DE2 development board hardware verification by using the Verilog HDL language.
DSP6713
- 包括定时器、SPI、SDRAM、Flash、FIFO等程序，均调试通过-SPI\SDRAM\Flash\FIFO\timer for DSP6713
FPGA_SDRAM
- FPGA对SDRAM的控制操作源码,用VERILOG硬件描述语言编写,包含的文件一共有:hostcont.v,inc.h,pinouts.ucf,sdram.v,top.v,tst_inc.h-Control of operation of the SDRAM FPGA source code, using VERILOG hardware descr iption language, the file contains a total of: hostcont.v, inc.h, pinout
paper_FPGA
- 基于FPGA控制的高速固态存储器设计，对固态存储器进行了需求分析, 根据航天工程对高速固态存储器的需求, 确定了设计方案。 针对航天工程对高速固态存储器速率要求较高的特点, 在逻辑设计方面采用流水线技术、并行总线技术。在器件选择方面, 采用LVDS构成接口电路, FPGA构成控制逻辑电路电路, SDRAM芯片阵列构成存储电路。设计了高速固态存储器。该设计简化了硬件电路, 大大提高了存储数据的速率。-FPGA-based control design of high speed solid s
memory_test.c
- SDRAM的测试源代码 包括谷值测试和写入测试还有其他一个测试方法-SDRAM test source code, including test and written test valley there are other ways a test
DDRdesigen.pdf
- DDR SDRAM设计及调试经验总结.pdf-DDR SDRAM design and debug Experience. Pdf
2440bootV5
- s3c2440-bootlaod 128M Nand 64M Sdram 可设定开机界面。-s3c2440-bootlaod 128M Nand 64M Sdram can set the boot interface.
sdram_controller
- SDRAM 控制器的 verilog 源代码, 针对Micron 的SDRAMS设计,支持全部的指令, 已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SDRAM controller verilog source code, for Micron' s SDRAMS designed to support all of the instructions, the logic has been verified, and actually used in chip des
FTOD_SDRAM10.3.18
- FPGA与DSP数据接口转换时序，简单实用的，SDRAM时序读写数据。-FPGA and DSP data interface conversion timing, simple and practical, SDRAM read and write data timing.
DDR2deFPGAsheji
- 使用 Virtex-4 FPGA 器件实现DDR SDRAM控制器以及DDR2 SDRAM操作时序-Using the Virtex-4 FPGA devices to achieve DDR SDRAM and DDR2 SDRAM controller operation timing
ref-ddr-sdram-verilog
- ddr_sdram开发参考verilog建模-ddr_sdram with verilog
sdram
- 这是针对FPGA的一个文档，内有SDRAM的源代码，对于学习SDRAM很有帮助。-This is a document for the FPGA, the source code within the SDRAM, SDRAM useful for the study.
altera_avalon_sdram_slave
- Altera avalon sdram controller salve.
DE0_SDRAM
- DE0开发板SDRAM测试程序，10为拨码开关作为数据写入SDRAM中存储，在读出用7段数码管显示-ALTERA DE0 SDRAM
SDRAM-control-principle
- 学习SDRAM控制原理的超好资料。看完马上就懂了-SDRAM control principle of super-learning good information. Read immediately understand the
SDRAM
- 基于SDRAM的存储器接口设计，采用verilog编写-SDRAM memory interface design based on
sdram_hr_hw_4port
- 这个是DE2上的SDRAM 四个端口的驱动代码，相当实用！-This is a four-port SDRAM on a DE2 driver code, very useful!
sdram
- verilog HDL语言，SDRAM驱动程序，基于FPGA，例子程序-verilog HDL languages, the driver, based on FPGA, an example program