搜索资源列表
xsoc-beta-093
- This free cpu-ip! use verilog
signal_cpu_sort
- Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_ME
embedded_risc
- 一个嵌入式RISC CPU 的Verilog 设计源码，可综合。内含详细的设计文挡。-an embedded RISC CPU design Verilog source code can be integrated. Detailed design containing the text block.
8051IPcore，verilogHDL实现
- 用verilog写的很好的cpu core-using Verilog write a good cpu core
sorce
- 一个很好的利用verilog编程实现的cpu程序，一定要好好利用。-a good use of the Verilog Programming cpu procedures, we must make good use of.
CPUverilog
- pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.
ccpu
- 这个是用VERILOG做的一个8位功能很弱的CPU-this is a done VERILOG eight functional weak CPU
riscdesign
- 一个非常简单的cpu设计的原代码,是用verilog编写的-a very simple cpu design of the original code, was prepared by the Verilog
Cpu_model
- Verilog HDL编写的CPU模型，很经典，比较通用-Verilog HDL prepared by the CPU model, classic, more generic
risc8
- 经典计算机体系结构RISC8的源代码（Verilog），包括CPU、内存、寄存器等的实现-classic computer architecture RISC8 the source code (Verilog), including CPU, memory, such as the realization Register
simple_cpu
- 初学cpu结构的很好的verilog代码的示例，适合初学者-novice cpu structure of the good verilog code examples for beginners
leg_source
- verilog hdl编写,六段流水线CPU.程序完整，功能强惊。分为多模块编写-verilog hdl prepared replace pipelined CPU. The integrity of the process, strong function scared. Divided into multiple modules prepared
riscmcu
- 精简CPU设计，需要的可以下来看看,是VERILOG语言写的-streamlined CPU design, the need to be down look at the language is written in verilog
VerilogHDL_p2s_s2p
- 在微型计算机系统中, CPU与外部的基本通信方式有两种,一种是并行通信即数据的各位同 时传送,其优点是传输速度较快,但数据有多少位就需要多少条传送线 而串行通信中数据一位一位顺序传 送,能节省传送线. 用Verilog HDL语言实现了串并、并串通信接口之间的转换
RISC_Core.ZIP
- 这是一篇关于8位RISC CPU设计的文章，其中包含了用Verilog语言编写的CPU内核程序
minirisc.tar
- verilog code .descrip the risc cpu.download from opencores.org
ALU
- 用verilog编写的32位alu部件，用于cpu制作
The_6th
- 一个自己写的8位CPU程序，以Verilog语言实现，仅可做8×8的乘法和8/8的除法，功能不强大，但对于初学Verilog的人应该有些帮助
simple_MCU
- 设计CPU方法及流程！VERILOG hdl
PicoBlaze_Embedded
- verilog语言编写，ISE8.2开发的，基于8位cpu PicoBlaze的程序