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Untitled1
- 锁相环一阶环的设计的仿真。自动画出线性和非线性的仿真结果-First-order phase-locked loop design simulation. Automatically draw linear and nonlinear simulation results
006
- 基于FPGA实现的一种新型数字锁相环-Based on the FPGA realization of a new digital PLL
timer_trigger_adc_PLL_SUCCESS
- DSP2407定时器触发ADC,并且进行软件锁相环的实现。-DSP2407 timer to trigger ADC, and the realization of a software phase-locked loop.
newDPLLdesign
- 使用VHDL语言进行数字锁相环的设计,pdf格式,可以打开-The use of VHDL language design of digital phase-locked loop, pdf format, you can open
NewWayOfDPLLdesign
- 使用VHDL语言进行设计DPLL(数字锁相环)的相关文件-The use of VHDL language design DPLL (digital phase-locked loop) of the relevant documents
DPLL2
- 全数字锁相环电路的研制,使用的是VHDL语言 -All-digital phase-locked loop circuit development, using the VHDL language
FPGA444555443
- 基于FPGA的全数字锁相环设计,内有设计过程和设计思想-FPGA-based all-digital phase-locked loop design, with the design process and design thinking
phase_lock_vhdl
- 在VHDL下实现锁相环的源码和说明文档.通常用于分频或倍频时进行相位锁定.-To achieve phase-locked loop in the VHDL source code and documentation. Normally used when the frequency or frequency-doubling phase locked.
pll
- 关于数字锁相环方面的代码,觉得还可以,或许对大家有用-the code of the pll
11112323
- 基于锁相环Top-down的建模方法在MATLAB环境下建立数字锁相环完整的仿真模型,并用SIMULINK对数字锁相环的仿真模型进行仿真。 -Top-down phase-locked loop based on the modeling method in MATLAB environment DPLL set up a complete simulation model, and use of digital phase-locked loop SIMULINK simulation mod
FrequencySynthesisbyPhaseLock
- 书籍频综和锁相环的Matlab源代码,对频综和锁相环的设计很有帮助;-Books PLL Frequency Synthesizer and the Matlab source code for PLL Frequency Synthesizer Design and helpful
pll
- 实现同步时采用锁相环,锁相环实现的原理,及源代码,-Implementation of the principle of phase-locked loop, and the source code,
shuzisuoxiang
- 数字锁相环(DPLL)技术在数字通信、无线电电子学等众多领域得到了极为广泛的应用。与传统的模拟电路实现的PLL相比,DPLL具有精度高、不受温度和电压影响、环路带宽和中心频率编程可调、易于构建高阶锁相环等优点。-Digital phase-locked loop (DPLL) technology in digital communications, radio electronics, and many other fields has been extremely wide range of
chenggong1204
- 用单片机控制锁相环,倍频数由外设键盘输入,输了频率范围0.1KHZ到80KHZ-89C51+PLL
suoxianghuan
- 此为锁相环函数发生器 包括键盘扫描程序 频率显示程序 波形显示程序-This is the phase-locked function generators including the keyboard scanner frequency waveform display shows process procedures, etc.
PLL
- 基于matlab的锁相环(PLL)仿真源代码-Matlab based on the phase-locked loop (PLL) simulation source code
suoxiang
- 该文件运用matlab仿真工具仿真通信中的关键技术之一,锁相环。采用不同的调制方式。-The document the use of simulation tools for communication matlab simulation of one of the key technologies, phase-locked loop. Different modulation.
phase-locked
- 主要是关于锁相环的环路滤波设计与计算,非常经典的-Mainly on the phase-locked loop filter design and calculation, very classic
Pllrrrr
- 锁相环(非科斯塔斯环) 对波动频率进行锁定,并且对信号进行解调。画图7个显示过程及参数-The phase locked loop(PLL),adjusts the phase of a local oscillator.the phase of the incoming signal is locked and the signal is demodulated show the process and references in 7 figures
MATLAB
- 二阶锁相环 m 文件,运行有图,应用广泛-Second-order phase-locked loop m documents, there are plans to run a wide range