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PLL-Bible
- 本书是锁相环技术领域的经典著作，在前两版的基础上进行了大幅的改写和扩充。不仅对传统锁相技术重新进行了更深入的考察并增加了许多从未发表的新内容，反遇了近年来最新技术进展。本书的重点是讲解基本原理，同时详细介绍了频率捕获、电荷泵锁相环等热点应用问题。 本书主要适用于通信电子行业的工程技术人员以及高等院校相关专业师生。-Bible of phase locked loop technology
spll_simplest_IQ
- 利用科斯塔斯环实现软件锁相环，完成信号相位的跟踪-Costas loop using software PLL to achieve complete phase tracking signal
PLL
- 锁相环通信系统仿真 包括预处理，仿真引擎，以及后处理-PLL communication system simulation including pre-processing, simulation engines, and post-processing
并网逆变
- 单相逆变整套程序，DSP28335完成的，研究生电子竞赛全国总决赛作品，含金量极高！AD，cap，pwm，液晶显示，锁相环，等等，算法巧妙，保护完整。
sxkbc
- 应用于非理想电网环境下的单相锁相环软件设计，采用FIR滤波器进行设计。(Design of single-phase phase-locked loop software for non ideal power grid environment, using FIR filter design.)
PllTwoOrder
- Verilog编写的二阶锁相环代码，环路可以收敛。(Verilog prepared by the second-order phase-locked loop code, the loop can converge.)
verilog_PLL
- 全数字锁相环的verilog源代码，包括鉴相器，K变摸可逆计数器，加减脉冲器和N分频器。已经仿真实现。(All digital phase-locked loop Verilog source code, including phase discriminator, K variable touch reversible counter, add and subtract pulse and N frequency divider. Have been implemented by simula
PLL
- 通过对输入时钟进行锁相环IP核配置，产生所需的时钟信号(By configuring the input clock PLL, the IP core generates the desired clock signal)
ideal_pll
- 本程序仿真了常用的理想二阶环路，对于研究锁相环大有裨益。(This program simulates the commonly used ideal two order loop, useful for the study of phase-locked loop.)
ADF4110_4111_4112_4113
- 基于单片机的锁相环编程，锁相环可用于倍频和锁相。(PLL programming based on single chip microcomputer, PLL can be used for frequency doubling and phase locking.)
PLL_simulink
- pll锁相环simulink模型，通俗易懂，可以实现的模型(Pll phase locked loop simulink model, easy to understand, can achieve the model)
C51锁相环
- 基于C51的锁相环，可修改锁相环所存时间(Phase locked loop based on C51)
Epwm_start
- 采用锁相环控制电机转速，能达到万分之几的精度(The motor speed is controlled by a phase-locked loop.)
one_phause_pll
- 描述： 单相锁相环仿真模型，适用于想了解PLL的同学。(a Phase Lock Loop (PLL) closed-loop control system, which tracks the frequency and phase of a sinusoidal signal by using an internal frequency oscillator. The control system adjusts the internal oscillator frequency to ke
PLL0324
- 风力发电并网matlab方针锁相环控制源码(feng li fa dian PLL matlab)
xianggan
- 使用costas锁相环实现载波同步提取相干载波，可以自由设定初始数据(Using Costas phase locked loop to realize carrier synchronization extraction of coherent carrier, the initial data can be set freely.)
zip
- 基于序阻抗的直驱风电场次同步振荡分析与锁相环参数优化设计((impedance modeling +PLL modeling) sequence impedance of direct drive wind power farm subsynchronous oscillation analysis and parameter optimization design based on PLL)
PLL
- verilog编写的锁相环程序。可以对照参考(Verilog prepared by the phase-locked loop program. Can control reference)
dpll
- 数字全锁相环的介绍文章，讲述了数字锁相环的实现原理和实现步骤(The introduction of the digital full phase locked loop is introduced, and the realization principle and the implementation steps of the digital phase locked loop are described)
PLL
- 一个基于二阶广义积分器的锁相环仿真模型，可以测得三相正弦信号的相位和频率(Phase-locked loop simulation model based on Nikai Hiroyoshi integrator)