搜索资源列表
rs232
- 这是cpld，EPM240数据通信rs232程序，希望与大家分享-This is cpld, EPM240 data communication rs232 procedure, hoping to share with you
ATmega128
- 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethern
CPLD-FPGA
- FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.
SimpleDriver
- Wince5.0+S3C2440扩展总线挂接CPLD的驱动-Wince5.0+ S3C2440 expansion bus drivers hooking CPLD
01171699
- 51单片机+CPLD结构，小板上集成了发光二极管，蜂鸣器，数码管，红外接收头，继电器，实时时钟，按键，AD（TLC1549），DA（TLC5615），232串口，LCD1602接口，LCD12864接口，单片机和CPLD引脚扩展接口，集成5V稳压电源，USB电源接口等功能。 -hhhhhhhhhhhhhhhhhhhhhhhhhhhhh
Lcd_Driver
- TFT LCD驱动,CPLD,XL95144-verilog-TFT LCD DRIVER-verilog
CPLD
- 基于CPLD 的交通灯设计
vhdl_sram_ctrl
- Sycronous SRAM in CPLD or FPGA module... tested by Altera MaxPlusII or Quatus -Sycronous SRAM in CPLD or FPGA module... tested by Altera MaxPlusII or Quatus II
DEC6713
- DSP 6713型号的基本源程序 可以对67系列进行初始化，对EDMA，CPLD进行配置。-6713 DSP basic models of 67 series source program can be initialized, to EDMA, CPLD configuration.
VHDL_Data
- 潘松的VHDL使用教程，已经制作书签，阅读方便，是学习VHDL新手的必备资料，FPGA/CPLD开发者可以参考的资料，-Pinson use of VHDL tutorial have produced bookmarks, reading easy to learn the essential information on VHDL novice, FPGA/CPLD developers can refer to the information,
cpldtest
- 一个cpld的点灯测试程序，用verilog hdl语言编写，具有参考性-A cpld the lighting test program, using verilog hdl language, with reference to sexual
CPLD(ZFZ2009-2-24)
- 转速表CPLD源程序代码,具有频率检测,数码管显示刷新，反转检测功能-Tachometer CPLD source code, with a frequency detection, digital tube display refresh, reversal detection
eda
- cpld开发板电路图，刚下载的，还不错，给大家看看。-the map of cpld developed board。
quaddecoder_verilog_ise11.2_used_09042010
- Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File. The Pinout is descr ipted in the Constrained file quad.ucf. To use them, y
OscilloscopesDIY
- 老外制作的数字示波器，包括原理图、PCB图、AVR程序,CPLD程序。希望对大家学习有所帮助.-Foreigners made digital oscilloscope, including schematics, AVR procedures, CPLD program. Want to help you learn
CPLD
- CPLD数字电路设计--使用MAX+plusⅡ入门篇,对于cpld初学者确实是一本好书。-CPLD digital circuit design- using MAX+ plus Ⅱ entry papers, for cpld really is a good book for beginners.
CPLD
- 基于CPLD的交通灯设计，本科课程设计，比较简单-CPLD-based traffic light design, undergraduate curriculum design, relatively simple
AlteraFPGACPLD
- 《ALTERA FPGA/CPLD 设计》附带光盘，内有书中案例的源代码及使用说明。-" ALTERA FPGA/CPLD Design" with CD case containing the book' s source code and instructions.
frequency_counter2
- 频率计，通过单片机 CPLD共同实现对输入方波信号测频率，测量范围1—10Mhz，带数码管译码显示-Frequency counter, through the joint realization of single chip CPLD input square wave signal measured on the frequency, measurement range 1-10Mhz, with a digital display control decoding
spi.tan
- vhdl spi cpld fpga cofiguration