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fifo
- 操作系统调度方法中的先进先出页面置换算法-Operating system scheduling methods FIFO page replacement algorithm
FIFO
- 用VERILOG写的FIFO程序，可以直接引用经本人测试-VERILOG written using FIFO procedures, can be directly invoked by the I test
Fifo
- 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
FIFO
- 一个用VHDL源码编写的先进先出(FIFO)缓冲器模块.可以进行FIFO的仿真验证-A source prepared by VHDL FIFO (FIFO) buffer module. Can verify FIFO simulation
fifo
- fifo example vhdl code
FIFO
- FIFO中文应用笔记，对学习单片机RAM、大量数据处理很有帮助。-FIFO notes
FIFO
- it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.-it is a
fpga.fifo
- 异步FIFO是用来适配不同时钟域之间的相位差和频率飘移的重要模块。本文设计的异步FIFO采用了格雷（GRAY）变换技术和双端口RAM实现了不同时钟域之间的数据无损传输。该结构利用了GRAY变换的特点，使得整个系统可靠性高和抗干扰能力强，系统可以工作在读写时钟频率漂移达到正负300PPM的恶劣环境。并且由于采用了模块化结构，使得系统具有良好的可扩充性。-Asynchronous FIFO is an important module which always used to absorb the
fifo-interface
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
FIFO
- 512×8bid的FIFO 含工程文件，基于QUARTUs-512 × 8bid the FIFO with the project document, based on the QUARTUsII
fifo
- FIFO程序，适用FPGA仿真的代码，有一定的价值-FIFO
fifo
- 用VHDL语言写的FIFO代码，可设FIFO的深度-VHDL language with code written in FIFO, FIFO depth can be set up
fifo
- linux下进程间通信方式之一的fifo读写源程序。-One of the IPC under linux, including fifo read and write source code.
FIFO
- This code is a FIFO memory vhdl developed in ISE Software
image-FIFO-SDRAM
- 图像缓存是图像处理系统设计的重点和难点，包括SDRAM和FIFO的设计，本PDF是设计图像缓存设计的好资料-sdram and fifo design for real-time image processing system
fifo
- fifo 的vhdl源程序,容量为1024*8的fifo程序代码-fifo the vhdl source code,Capacity of 1024* the fifo code 8
fifo.vhd
- This a FIFO in VHDL Code-This is a FIFO in VHDL Code
fifo
- c语言实现内存调度 FIFO LFU LRU 基于vc6.0 -c language memory-based FIFO LFU LRU scheduling vc6.0
FIFO
- 先进先出算法 fifo 时自己编写的 有注释 很简单-Fifo FIFO algorithm when there are notes I have written is very simple
FIFO
- FIFO以及跨时钟域的同步问题。 FIFO有分离的地址总线和用以读写数据的数据通道，以及指示堆栈状态（满、将满等）的状态线。-FIFO as well as cross-clock domain synchronization. FIFO have separate address bus and read and write data to the data channel, as well as the instructions state stack (full, will be fu