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USB-slavefifo
- 本组程序包括FPGA程序,固件程序和上位机程序,实现USB的数据传输功能,采用Slave Fifo模式,上位机程序利用Cypress公司提供的库函数进行开发
USB-FPGA控制信号文档
- USB-FPGA控制信号文档
T2_USB_IN.rar
- usb芯片cy7c68013从fpga中读入数据的演示程序,verilog语言,CY7C68013 chip usb read from the FPGA into the data presentation process, verilog language
Mars-SP3-U_SCH.rar
- 一块XC3S400 FPGA电路板的原理图,板子上有CY7C68013A作为USB接口,A XC3S400 FPGA circuit board schematics, board have CY7C68013A as USB interface
usb_Blaster_rev0.rar
- USB Blaster 为Altera 公司针对 CPLD / FPGA 推出的高速编程设备,USB Blaster for the Altera Corporation for CPLD/FPGA devices introduced high-speed programming
FPGA-based-USB-system-design
- 基于FPGA的USB通讯系统设计,方便FAGA设计人员进行参考-USB FPGA-based communication system designed to facilitate the design staff reference FAGA
USB2.0
- usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
usb_wr_firmware
- CY7C68013固件 FPGA把数据通过usb写入pc slave 模式 使用 EP6 -USB:FPGA write data to PC by USB change from cypress example slave mode and use EP6 bulkloop.c firmware based on the firmware frameworks. Building this example requires the full vers
usbFPGAconnect
- 该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序,FPGA上的VERILOG通信程序。-The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, incl
FPGA_VHDL_code
- FPGA学习非常珍贵的资料,包括USB、UART、I2C、Ethernet、VGA、CAN等总线的VHDL实现,可以直接应用于实际项目中。需要的请下载。 -FPGA to learn very valuable information, including USB, UART, I2C, Ethernet, VGA, CAN bus, such as VHDL to achieve, can be directly applied to actual projects. Need to do
CY7C68013FPGA
- USB控制芯片cy7c68013与FPGA通过slave fifo方式通信,块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
xtp051_sp601_schematics
- Xilinx公司最新的Spartan 6系列FPGA所用的开发板电路图,详尽包括了电源、IO、外设、USB等部分的内容,极具有参考价值,另外还有一个USB芯片 68013所使用的HEX文件可供下载-Xilinx' s new Spartan 6 Series FPGA development board used in circuit detail, including the power, IO, peripherals, USB and some other content, most
usb_jtag
- FPGA、CPLD芯片的usb数据下载线,下载速度是并口的5位,内有原理图用程序-FPGA, CPLD chip usb data download lines, download speed is the parallel port of the five, with a schematic diagram of procedures in
Fifo
- 一个FIFO源代码,基于Altera FPGA-A FIFO source code, based on Altera FPGA
USBandFPGAjiekou
- USB与FPGA接口的程序设计。里面是所有的源文件都经本人测试可以用,放心下载吧-USB interface with the FPGA programming. Inside are all the source files have been tested, I can use, rest assured that you download
DE2_USB_API
- 这是ALTERA 公司的DE2开发板上的关于USB API开发的例子-This is ALTERA' s DE2 Development Board regarding the USB API to develop examples of
USBblaster
- FPGA的USB应用电路,已经成功通过测试,可以量产。-Application of FPGA circuit of the USB has been successfully tested, can be mass production.
55593379usb(FPGA)
- this a vhdl code for a bus-this is a vhdl code for a bus
DE2_NIOS_DEVICE_LED
- Altera FPGA 上利用nios嵌入式处理器实现USB的通信控制-Altera FPGA embedded processor nios use USB communication to achieve control