搜索资源列表
Lab_02
- Verilog 3-to-8 Decoder on Spartan3E. Use 3 switches (SW[2:0]) as inputs. Keep SW[2] as MSB. Use 8 LEDs (LD[7:0]) as decoded outputs. i.e. if all input switches are turned off, LD0 should light up.
vga_vhdl
- vga vhdl 语言编写的vga驱动代码在spartan3e开发板上通过-vga vhdl language vga driver code development board through the spartan3e
ADPLL
- This paper presents the ADPLL design using Verilog and its implementation on FPGA. ADPLL is designed using Verilog HDL. Xilinx ISE 12.1 Simulator is used for simulating Verilog Code. This paper gives details of the basic blocks of an ADPLL. In this p
ADPLL
- This paper presents the ADPLL design using Verilog and its implementation on FPGA. ADPLL is designed using Verilog HDL. Xilinx ISE 12.1 Simulator is used for simulating Verilog Code. This paper gives details of the basic blocks of an ADPLL. In this p
LCD_counter
- xilinx spartan3E 开发板上LCD显示屏驱动，并显示周期为一分钟的计数器。-Xilinx spartan3E development board on the LCD display drive, and display the cycle counter for a minute.
rotation_adjust
- xilinx spartan3E开发板上旋转按钮的驱动，利用旋钮旋转控制LED灯的亮暗程度，从灭到亮有10种不同的亮度。-Xilinx spartan3E development board rotate button on the drive, using the knob control LED lamp brightness level, there are 10 kinds of different from out to bright brightness.
VGA1
- 这是我自己的一个流水灯的设计编程 在ise10.1环境下做的Verilog编程 用Spartan3E basys2开发板可以实现八个led灯的循环 有一个复位rst 设计关键是分频器的设计 这里运用的是d触发器实现50MHz的50M分频-This is my own design of a light water program in ise10.1 do Verilog programming environment with Spartan3E basys2 development bo
spwm_wave
- 此程序为在spartan3e上经过验证的可以运行的通过查表法产生的spwm发生器-the project can produce spwm wave
udpSender
- Module Ethernet UDPsender for spartan3E.
vga_controller
- vga controller (640x480) Spartan3E FPGA board
FPGA_LED_testcode
- LED test on Spartan3E , speed variation, light intensity variation
sdram
- ISE14.4环境编程，XILINX spartan3E,SDRAM完整编程-xilinx sdram
vga1
- 利用Spartan3E 编写代码实现VGA显示器的单色显示、条纹显示等基本显示功能-use Spartan3e to make VGA display single color stripes
AudioDelay_12bit
- Experimental digital ADC and audio delay using VHDL on Spartan3E 500k
paomadeng
- VerilogHDL实现跑马灯源码，开发环境：ISE14.7.板子测试Spartan3E - VerilogHDL实现跑马灯源码，开发环境：ISE14.7.板子测试Spartan3E VerilogHDL achieve marquee source code, development environment: ISE14.7. board test Spartan3E
src
- Spartan-3E. Working VHDL code for amplifier LTC6912, adc LTC1407A-1, dac LTC2624. Archive includes vhdl files and ucf file with comments. Create new project add files and it will be to work.
pro1102
- 基于Spartan3e交通灯简易尝试，verilog hdl project(A simple attempt based on Spartan3e traffic lights, Verilog HDL project)