搜索资源列表
uvm
- the Universal Verification Methodology (UVM) for creating SystemVerilog testbenches.
uvm-1.1d.tar
- UVM World 官方发布的UVM（通用验证方法学）的源代码，基于SystemVerilog，用于ASIC Verification。2013-03最新发布版本uvm-1.1d.tar.gz-The UVM World official release of the source code of the UVM (Universal Verification Methodology), based on SystemVerilog for ASIC Verification. 2013-03
uvm
- UVM验证平台的介绍，在验证方面效率由于systemverilog。-UVM verification platform introduced in verification efficiency due systemverilog.
uvm-1.1c.tar
- UVM test bench source code for verilog development
uvm-1.1d
- uvm 源代码开发，基于此可以实现芯片验证加速和验证充分保证-uvm system verilog based code
uvm-1.2.tar
- UVM 1.2 golden code, -code for UVM,
UVM
- uvm验证方法学入门。step by step，适合IC验证人员入门-uvm verification methodology started. step by step, for IC verification personnel entry
UVM张强 书上例子代码
- 张强UVM实战书上例子的所有源代码，学习UVM的好资料！！！
uvm-1.1
- 学习IC验证的好资料，包括UVM-1.1a和UVM-1.1d的全部工程example,适合IC验证基于UVM平台的初学者。-Learn good about IC verification, including all engineering of UVM-1.1a and UVM-1.1d, for beginners based on the UVM platform for IC verification.
uvm-crc-test
- UVM简单例程，DUT为Verilog小程序。(UVM simple routine, DUT is Verilog applet.)
eetop.cn_UVM
- UVM 的 入门实例，一个完整的能够跑通的实例。其中包括DUT代码，Testbench代码，(UVM entry example, a complete example of running through. These include the DUT code, the Testbench code,)
verify
- 一个复杂的uvm verification例子(a complicate uvm verification example)
THE_UVM_PRIMER_CODE_EXAMPLES.tar
- The exmaples for the ebook The UVM Primer An Introduction to the Universal Verification Methodology by Ray Salemi The UVM Primer is the book to read when you've decided to learn the UVM. The book assumes that you have a basic knowledge of SystemVeri
UVM_GetStart
- From OVM to UVM UVM is based on OVM, so from the outset it should be very straightforward to interoperate between OVM and UVM or to convert old OVM code to UVM code. We thought we would test this out by converting our existing online tutorial Getti
I2C Verification environment
- UVM verification for I2C
mycode
- 这是open silicon interlaken user interface的一个driver,采用的是uvm的架构，能够实现single/dual/quad segment的配置(This is a open silicon Interlaken user interface driver, using the UVM architecture, to achieve the configuration of single/dual/quad segment)
uvm-cookbook-complete-verification-academy
- UVM cookbook from mentors
UVM示例平台
- 一个UVM完整组件的测试平台，以一个简单的路由器作为例子进行UVM测试(A test platform for UVM complete components, taking a simple router as an example for UVM testing.)
uvm实战源码
- uvm实战教程源码，丰富的uvm demo testbench,可以学习uvm各个阶段的testbench搭建技巧，能学习到大量的uvm testbench搭建技能，比如factory和寄存器模型等重要机制，非常值得学习
UVM验证平台搭建
- 搭建uvm验证平台,通用验证平台结构和搭建流程介绍(How to build a common UVM verification platform?An easy and useful method is instroduced here.)