搜索资源列表
wiredly
- DDR2生成文件是使用DDR2不可少的代码,是软件自动生成的~-DDR2 DDR2 generated file is essential to use the code, the software automatically generated ~
u-boot-2010.06-rc2.tar
- u-boot-2010.06-rc2,在smdk2416开发板的移植,nand方式启动。可tftp方式下载程序。资源:DDR2 64M,网络CS8900。NAND k9f1g08。-u-boot-2010.06-rc2, the development board in smdk2416 transplant, nand way to start. Can tftp to download program. Resources: DDR2 64M, network CS8900. NAND k9
DDR2_ctrl2
- DDR2_ctrl_fpga實現方法 內有FPGA使用簡介-FPGA design flow about DDR2
DDR2_32Mx16_VHDL
- ddr2 implementation software for xilinx 10.1 sp3
DDR2_test_Virtex5
- 针对于Virtex5 FPGA的DDR2读写测试的完整工程,2颗DDR2芯片的数据总线并接为32位,时钟200MHz-A full project for DDR2 test in Virtex5 FPGA board, with 32 bit data bus and 200MHz clock
DDR2SDRAM
- dm6446例程实验报告,详细的介绍了ddr2 sdram实验的过程-dm6446 report of the example
ddr
- DM6437 DDR2模块 驱动和测试程序,已经过调试和测试,放心使用-DM6437 DDR2 Drivers, and test procedures
PCIeDDR2add
- PCIE-DDR2-双通道ADDA板主要用于AD数据的记录与回放。该板主要使用Xilinx公司的Virtex5 FPGA,通过PCIE IP核与主机通讯,存储系统包括DDR2 SDRAM和FLASH,为各种软件无线电技术的应用提供了一个非常强大的单插槽收发器解决方案。-PCIE-DDR2 dual-channel ADDA board is mainly used for the AD data recording and playback. The board Virtex5 the FPGA
ddr2_sodimm_x64_333MHz_hp2
- DDR2内存条(sodimm封装)的控制器设计-DDR2 controller for sodimm
k4t51xx3qj_rev11
- 64M 三星samsung公司的ddr2芯片的数据手册,在网上难找,直接问芯片供应商要的-64M DDR2 datasheets, online hard to find, to ask directly to the chip suppliers
Verilog_module
- micron 1G内存条verilog模型,对应具体信号为MT8HTF12864HZ-800,内存颗粒为MT47H128M8CF-25-micron 1G DDR2 SDRAM verilog module
ddr2_demo
- lattice 操作DDR2控制器verilog源代码-the verilog source code of ddr2 control of lattice
2048Mb_ddr2_verilog_model
- ddr2 verilog model,用于验证DDR2 Controller。-DDR2 Verilog model, and used to verify the DDR2 Controller.
VmodCAM-0.0
- 从VMOD设想头中读入视频流数据,将其存在ddr2中,并且通过Hdmi线显示出来-Read into the video stream data from the VMOD envisaged head, exist ddr2, and the the Hdmi line displayed
FSM
- FPGA学习资料,新手入门资料,VERILOG- Micron SDRAM DDR2 Simulation model Verilog
ddr
- DDR2内存条在FPGA中的应用,包括内部结构,时序操作和注意事项。-about DDR2 APLLICATION IN FPGA,includ inner instraction timequist and attend.
ddr2_sdram_latest[1].tar
- ddr2 sdram 控制器的vhdl源码,并包括了ddr2 sdram芯片的仿真模型-DDR2 sdram controller VHDL source code and ddr2 sdram simulation module
ug_ddr_sdram
- DDR and DDR2 SDRAM Controller Compiler 的用户向导-DDR and DDR2 SDRAM Controller Compiler User Guide
emi(1)
- the external memory interface for the ddr ddr2 ddr3 sdram device
DDDRR2_sdrramD
- DDR2 的控制器,它是由由LATTICE的编译器生成。 -DDR2 controller, which is generated by by LATTICE the compiler.