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fifo_4X16
- 完整的FIFO Verilog程序,经过仿真验证,直接可用-FIFO Verilog
Asynchronous-FIFO-Design
- 异步FIFO设计,一共包含6个模块,使用的硬件描述语言verilog。-Asynchronous FIFO design,including six modules.HDL language is verilog.
FIFO
- FIFO的设计,用Verilog HDL语言编写-The design of FIFO,using Verilog HDL program language
FIFO
- Verilog代码,实现FIFO先入先出存储-FIFO CODE,VERILOG
afifo
- verilog HDL fifo , verilog HDL fifo , -verilog HDL fifo ,verilog HDL fifo ,verilog HDL fifo ,verilog HDL fifo ,
NANDFlashcontrolandFIFOcontrol
- 实现NAND Flash块的控制存取以及同步的FIFO的控制 verilog 代码-NAND Flash control access and control of the synchronous FIFO verilog code
5-verilog-programs
- the file contains 5 verilog source codes 1. varying pulses 2. DRAM 3. FIFO 4. UART 5. 16 bit divider
Example1
- fifo verilog hdl along with test bench its hardware
fifo
- 采用verilog语言的fifo设计。用notpad编辑-Verilog language fifo design. Edited using notpad
10_100m_ethernet-fifo
- 本源码源自于网络,采用verilog编写完成10M以太网到100M以太网的FIFO转化。-The source from the network, using verilog written 10M Ethernet 100M Ethernet FIFO conversion.
FIFO
- FIFO is accomplished with the code which is written using the language of verilog.FIFO is the means of first output while first input
async-fifo
- Verilog codes for asynchrounous fifo design
FIFO
- 是用verilog HDL写的基于FIFO的串口发送机的设计,很详细的代码,很值得学习,已经验证通过-With verilog HDL based on FIFO serial transmitter design, write code, it is worth learning, has been verified by.
fifo-code
- Verilog代码:同步\异步FIFO。包含格雷码计数器.-Verilog code: syncronous\asyncourous FIFO. containing gray counter.
FIFO-and-CAM
- verilog code for gray counter,synchronous and asynchronous fifo
FIFO
- 用verilog做的FIFO程序,仿真通过-FIFO procedures to do with verilog simulation by
fifo
- FPGA Verilog语言编写的fifo模块-The fifo module of FPGA Verilog language
sync-and-asyn_FIFO_verilog
- 同步与异步FIFO的verilog实现,包括源代码,testbench,测试以及综合通过,还有相关参考资料-Synchronous and asynchronous FIFO verilog achieve, including source code, testbench, test and integrated through, as well as related references
FIFO
- 将ROM的正弦波数据输入FIFO存储器,然后输出,有modelsim仿真波形-Verilog FIFO ROM mif sine
Verilog FIFO
- FPGA的FIFO源代码,经过调试,下载即可用。适合模块调用或嵌入,也适合初学者学习。