搜索资源列表
SDRAM-design-FPGA-altera
- SDRAM design FPGA altera-SDRAM design FPGA altera.
SDRAM
- verilogHDL语言编写，简单的FPGA写sdram程序，初学者必备。-verilogHDL language, write a simple FPGA the sdram program, beginners must.
sdram-control
- 基于FPGA的SDRAM读写控制程序，由VHDL语言编写-FPGA-based SDRAM read and write control program, by the VHDL language
FPGA-SRC
- 用于DSP+FPGA开发系统，可用于采集一帧图像并控制SRAM、SDRAM数据存取。-Used in DSP+ FPGA development system, to capture an image and control the SRAM, SDRAM data access.
DDR3-SDRAM-Controller
- DDR3的控制器（并带有Testbench），可烧录到FPGA中对内存进行读写，相关技术人员可在该代码上修改用于其他场合-DDR3 controller (with an Testbench), the FPGA can be burned to the memory read and write, the relevant technical staff can modify the code to be used on other occasions
SDRAM_Con
- 这是关于一篇怎样设计SDRAM的一篇论文，希望对学习FPGA中SDRAM的朋友有帮助。-This is about how to design an SDRAM in a paper, I hope to learn the FPGA SDRAM to help a friend.
SDRAM_96M_UART_TestOK
- SDRAM_96M_串口实验OK 一个项目工程，硬件包含Altera FPGA，SDRAM，串口，使用verilog-SDRAM_96M_ serial experiments OK a project engineering, hardware contains Altera FPGA, SDRAM, serial port, using verilog
DACtoADCtoSPI_Triangle1
- DACtoADCtoSPI_Triangle1.zip 一个项目工程，硬件包含Altera FPGA，SDRAM，串口，使用verilog-DACtoADCtoSPI_Triangle1.zip a project engineering, hardware contains Altera FPGA, SDRAM, serial port, using verilog
sdram_driver_v2
- FPGA的SDRAM_DRIVER程序，已在DE2开发板上实测，可用。-The FPGA SDRAM DRIVER program, have been measured in the DE2 development board, the available.
USB2.0
- usb2.0+FPGA+SDRAM一整套测试程序- usb2.0+ FPGA+ SDRAM set of test procedures
sdram
- FPGA读写SDRAM。里面有详细的注释，供初学者参考，Verilog 语言-FPGA read SDRAM. There are detailed notes, reference for beginners,
SDRAM-controler-based-on-the-FPGA
- 本例是用FPGA器件实现SDRAM操作，所用语言为verilog硬件描述语言，希望可以对学习FPGA的人起到帮助作用-In this case is to achieve SDRAM operating with FPGA devices, and use of language verilog hardware descr iption language, I hope people can learn to play FPGA helpful
DDR-SDRAM-Controller
- DDR SDRAM控制器verilog代码及中文说明文档-DDR SDRAM Controller Using Virtex-5 FPGA Devices
SDRAM-control
- 使用FPGA实现的SDRAM控制器访问代码，该代码的时序参数可调整-SDRAM controller FPGA implementation using the access code, the code is adjustable timing parameters
1-SDRAM
- 串行接口是最简单的一种通信方式，串口通信有两种方式，一种是同步串行，如SPI接口；另一种则是异步串行，即我们所说的UART。这个项目向大家展示了如何使用FPGA来模拟UART收发器。-uart fpga verilog
SDRAM
- 基于FPGA的nios ii嵌入式SDRAM应用开发程序，仅供参考学习使用，谢谢。-NIOS based on the II FPGA embedded SDRAM application development process, only reference learning to use, thank you.
sdram_top
- 使用FPGA实现SDRAM逻辑控制器，适用于各种型号的FPGA-SDRAM control by verilog
按键控制led
- 按键控制led灯亮灭顺序，从左到右跑或者从右往左跑(Press button to control the LED lights on and off)
11_ddr3_test
- fpga ddr3 sdram verilog 黑金的板子(fpga ddr3 sdram verilog)
sdram_16bit_latest.tar
- 这个IP核是一个小型的，简单的SDRAM控制器，用于为16位SDRAM芯片提供32位流水线的二叉树接口。 当访问开放行时，读写可以流水线实现完整的SDRAM总线利用率，但是读写之间的切换需要几个周期。(This IP core is that of a small, simple SDRAM controller used to provide a 32-bit pipelined Wishbone interface to a 16-bit SDRAM chip. When acce