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  1. lfsrdsr

    0下载:
  2. 密码学中用于加密用的LFSR和DSR移位代码,是加密系统中的一个基础知识-Cryptography LFSR used for encryption and DSR code shift is a encryption system based on knowledge
  3. 所属分类:Crypt_Decrypt algrithms

    • 发布日期:2017-04-07
    • 文件大小:41159
    • 提供者:珉珉
  1. lfsr.v.tar

    0下载:
  2. linear feedback shift register for generator in verilog code for random sequence generation.
  3. 所属分类:Other systems

    • 发布日期:2017-03-27
    • 文件大小:1768
    • 提供者:balu
  1. LFSRTest

    0下载:
  2. test program for LFSR operation
  3. 所属分类:Modem program

    • 发布日期:2017-04-08
    • 文件大小:53274
    • 提供者:smith bai
  1. UHF-RFID-CRC

    1下载:
  2. 本文首先研究了IsO/IECl8000.6标准中A、B两类短程通讯的前向链路与返回 链路的数据编码方式,对(FMO)双相间隔编码、(PIE)脉冲间隔编码、曼切斯特码 的编解码方式和技术参数进行了深入的分析,并利用FPGA实验平台对这三种编 码的编、解码电路进行了设计和仿真。然后对UHF RFID系统的差错控制技术原理 进行了探讨,重点研究了ISo/IECl8000.6标准中采用的数据保护与校验技术,即 循环冗余校验(CRC)技术。分析了基于线性反馈移位寄存器(LFSR)实现C
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-16
    • 文件大小:4366124
    • 提供者:HY jian
  1. ass1_2_hamming

    0下载:
  2. Hamming codes are a class of binary linear codes. They can detect up to two simultaneous bit errors, and correct single-bit errors. In particular, a single-error-correcting and double error detecting variant commonly referred to SECDED.-a) Develop a
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-09
    • 文件大小:1133589
    • 提供者:wei chenghao
  1. 2

    0下载:
  2. LFSR and stream password \ generate nonlinear sequences \ DES algorithm for encryption and decryption operations, in front of a few relatively simple, DES algorithm results also
  3. 所属分类:CA program

    • 发布日期:2017-04-11
    • 文件大小:1145
    • 提供者:皇子
  1. VHDL

    0下载:
  2. For the animal file: we built a system that took in a UAC code and output if the animals need vaccines and if we are in danger of being eaten Seven_segment Clock_Design : built a clock State_machine: RoboRacer game (r9-bit LFSR) For the Elev
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-09
    • 文件大小:1785958
    • 提供者:Michael Ng
  1. CRC-Parallel-Computation

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  2. 用软件实现CRC校验码计算很难满足高速数据通信的要求, 基于硬件的实现方法中, 有串行经典算法LFSR,电路以及由软件算法推导出来的其它各种并行计算方法。以经典的LFSR,电路为基础, 研究了按字节并行计算CRC校验码的原理.-Implemented in software CRC checksum calculation is difficult to meet the requirements of high-speed data communications, hardware-based
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:205611
    • 提供者:Geer
  1. generic_fifo_yh

    0下载:
  2. Generic, multi-purpose FIFOs. Available as single clock and dual clock version, binary, lfsr, and gray encoded (dual clock only). All are parameterizable and use generic_memories for memory. These FIFOs are fully portable from FPGAs to ASICS.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:38204
    • 提供者:杨豪
  1. lfsr

    0下载:
  2. simple PRBS generator using verilog hdl
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-10
    • 文件大小:563
    • 提供者:karthik
  1. LFSR-Code

    0下载:
  2. wire less lan program
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-11
    • 文件大小:1026
    • 提供者:suresh
  1. LFSR_UPDOWN_Verilog

    0下载:
  2. the LFSR up/down counter are designed in a verilog module easy to implement in any counter operation.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-28
    • 文件大小:9747
    • 提供者:rajapraba
  1. LFSR

    0下载:
  2. Linear Feedback Shift Register created to generate random numbers
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-01
    • 文件大小:249407
    • 提供者:banhallem
  1. lfsr

    0下载:
  2. 用于扩频通信中的M序列产生器 数控振荡器中可以提高SFDR参数-M series generater
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-04
    • 文件大小:854
    • 提供者:王光如
  1. MinLFSR

    1下载:
  2. 利用BM算法进行扰码多项式以及初态的识别,亦即最小LFSR的识别。-Identify scrambler polynomial and the initial state with BM algorithm, which is actually the identification of minimum LFSR.
  3. 所属分类:Graph Recognize

    • 发布日期:2017-04-04
    • 文件大小:2782
    • 提供者:yichen
  1. mSequences

    0下载:
  2. Maximum Length PN sequences are binary sequence generators that are capable of outputting all possible combinations of binary sequences in 2^m-1 cyclic shifts, where m is the size of the LFSR (Linear Feedback Shift Registers ) used in generating such
  3. 所属分类:Other systems

  1. hw08.ps

    0下载:
  2. Maximum Length PN sequences are binary sequence generators that are capable of outputting all possible combinations of binary sequences in 2^m-1 cyclic shifts, where m is the size of the LFSR (Linear Feedback Shift Registers ) used in generating such
  3. 所属分类:File Operate

  1. RSN

    0下载:
  2. “Randomized Smoothing Networks” introduced the idea of using networks composed of a type of comparator/memory element, initialized to random initial states, to create smoothing networks, which take arbitrary input loads into the network and produce a
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-05
    • 文件大小:247885
    • 提供者:Stephen Bishop
  1. LFSR_23

    0下载:
  2. LFSR (Linear Feedback Shift Register) for polynomial (23,18)
  3. 所属分类:Other systems

    • 发布日期:2017-03-31
    • 文件大小:1675
    • 提供者:babak
  1. extension_pack_latest.tar

    0下载:
  2. This project contains files you can use to expand upon the basic IEEE packages you normally use for creating testbenches and RTL code. Automatic count stop/start value generation functions. You enter a time duration and clock frequency and the v
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-11-09
    • 文件大小:1068950
    • 提供者:Louis
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