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  1. LFSR_FIFO_GasP

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  2. • LFSR uses global clock > Every stage contains valid data > Data moves in lock-step > Bit sequencing and synchronization implicitly enforced • Async implementation requires explicit control > Not every stage contains
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-11-08
    • 文件大小:122923
    • 提供者:Prashanth
  1. LFSR_generator

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  2. This the matlab code for linear feedback shift register (LFSR).LFSRs is used for generating pseudo-random numbers, pseudo-noise sequences, fast digital counters-This is the matlab code for linear feedback shift register (LFSR).LFSRs is used for gene
  3. 所属分类:Other systems

    • 发布日期:2017-11-25
    • 文件大小:2225
    • 提供者:pooh
  1. abc

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  2. 线性反馈与对偶移位寄存器的功能实现 实现n-LFSR与 n-DSR(n为正整数)进动一拍的程序(旨在能“由寄存器的一个状态算出紧接着的下一个状态”) 寄存器状态的各分量自然地与相应数据存储区的各比特位一一对应,不允许仅1个状态分量就占据1个存储单元(字节、字或双字等)。-Linear feedback shift register with dual function realization The realization of n-LFSR and n-DSR ( n is
  3. 所属分类:Crypt_Decrypt algrithms

    • 发布日期:2017-11-14
    • 文件大小:177984
    • 提供者:周晗
  1. LAB-16

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  2. 用FPGA实现的性线反馈移位寄存器(LFSR)设计。整个工程在quartusII环境下,用verilog编程。-FPGA implementation of the line feedback shift register (LFSR) design. The whole project in verilog programming the quartusII environment.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-11-22
    • 文件大小:304314
    • 提供者:李娟
  1. total

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  2. matlab 隐写和隐写分析代码 由LFSR生成密钥的函数~可以实现正向隐写与逆向隐写分析 估计嵌入率 ~注解详细-matlab steganography and steganalysis forward steganography reverse function to generate a key code plus LFSR the steganalysis estimated embedding rate to comments in detail
  3. 所属分类:Special Effects

    • 发布日期:2017-11-13
    • 文件大小:1756
    • 提供者:科科
  1. rc4_console

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  2. 伪随机数发生器LFSR及其在流密码RC4中的应用-Pseudo-random number generator LFSR in the stream cipher RC4
  3. 所属分类:CA program

    • 发布日期:2017-11-27
    • 文件大小:211992
    • 提供者:飞哥
  1. 18472582m_sequence_3

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  2. 基于lfsr的伪随机序列发生器,带有游程检测-Pseudo-random sequence generator based on lfsr with run detection
  3. 所属分类:Crypt_Decrypt algrithms

    • 发布日期:2017-11-21
    • 文件大小:849
    • 提供者:张振鹏
  1. Encrypt-system

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  2. 一系列的加密算法,包括恺撒密码、KeyWord密码、PlayFair密码、Vigenere密码、LFSR密码、RC4密码、DES密码和IDEA密码。-A series of encryption algorithms, including Caesar password, keyword password, the Playfair password, the Vigenere Password, the LFSR password, RC4 password DES password and
  3. 所属分类:CA program

    • 发布日期:2017-11-13
    • 文件大小:13936
    • 提供者:liulanshui
  1. New-Text-Document

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  2. NOTE THAT THE DESCRAMBLE ROUTINE IS IDENTICAL TO THE SCRAMBLE ROUTINE this routine implements the serial descrambling algorithm in parallel form this advances the lfsr 8 bits every time it is called this uses fewer than 25 xor gates to imple
  3. 所属分类:Windows Develop

    • 发布日期:2017-11-19
    • 文件大小:792
    • 提供者:truong nhan
  1. LFSR

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  2. 反馈移位寄存器代码,求图像像素相关性-Feedback shift register code, and the image pixel
  3. 所属分类:Special Effects

    • 发布日期:2017-11-08
    • 文件大小:1025
    • 提供者:周秀玲
  1. LFSR

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  2. 序列密码--线性反馈移位寄存器--是密码学的基础,密码编程的前部分在这-Cipher- a linear feedback shift register- is based on cryptography, passwords in the first part of programming! !
  3. 所属分类:Console

    • 发布日期:2017-11-28
    • 文件大小:155989
    • 提供者:艾力
  1. RAMFIFO_Ctrl_LFSR

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  2. RAMFIFO with LFSR Controller
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:4956
    • 提供者:hadimk
  1. random_num_gen

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  2. Combination is formed by permuting and XORing 32 bits of LFSR and CASR
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-09
    • 文件大小:2880903
    • 提供者:ad
  1. LFSRT

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  2. LFSR it generates a random test sequence, this is the .v cod. It works well and there is the attachment doc . enjoy it !!!!!!!!!! -it generates a random test sequence, this is the .v cod. It works well and there is the attachment doc . enjoy it !!!!
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-25
    • 文件大小:94312
    • 提供者:Jason
  1. LFSR

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  2. 流密码算法C++实现,使用六级线性反馈移位寄存器,生成64位的密钥,在对数据进行加密,同时整合Socket编程,实现进程间加密通信。-C++ stream cipher algorithm implementation, using six linear feedback shift register to generate a 64-bit key to encrypt data at the same time integrating Socket programming, encrypte
  3. 所属分类:Crypt_Decrypt algrithms

    • 发布日期:2017-05-10
    • 文件大小:2175278
    • 提供者:lecision
  1. CRC32_II

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  2. 基于第二类LFSR串行CRC生成器的32位并行实现结构。用于SATA 3。 verilog语言。-32bit parrallel CRC module as specified in SATA 3. The module is realized with verilog.
  3. 所属分类:MPI

    • 发布日期:2017-04-08
    • 文件大小:1128
    • 提供者:邢博
  1. CRC_test

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  2. 基于verilog编写的CRC校验程序,采用LFSR电路实现。-CRC verilog
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-17
    • 文件大小:19975
    • 提供者:jack
  1. LFSR

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  2. This is a Random Sequence generator used in Cryptography, Spread Spectrum, Information Security
  3. 所属分类:matlab

    • 发布日期:2017-04-13
    • 文件大小:2420
    • 提供者:monchin
  1. counter_4bit

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  2. This four bit counter using LFSR Technique.... The rightmost bit of the LFSR is called the output bit. The taps are XOR d sequentially with the output bit and then fed back into the leftmost bit. The sequence of bits in the rightmost position is ca
  3. 所属分类:Other systems

  1. lfsr_top

    0下载:
  2. LP LFSR for low power test pattern generation_V
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-08
    • 文件大小:639
    • 提供者:hr
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