搜索资源列表
FPGA_SPI
- FPGA实现SPI的内核驱动 FPGA实现SPI的内核驱动
FPGA_SPI_and_SPI_flash
- 关于SPI 方式FPGA配置和SPI flash编程的资料-FPGA configuration mode on the SPI and the SPI flash programming information
spartan3e_test
- Drive for ADC-DAC POR FPGA SPARTAN 3E STARTER KIT
Bspii_masttera
- 一种基于CPLD/FPGA的的SPI控制的IP核的实现spi -Based on CPLD/FPGA IP core SPI control realize spi
fpgaspi
- LabVIEW FPGA SPI implementation
zhu
- 基于FPGA的SPI接口设计，主模式，频率可调，verilog HDL编写-FPGA-based SPI interface design, master mode, adjustable frequency, verilog HDL prepared
spi
- FPGA实现spi自发自收，verilog代码-FPFA spi verilog
SPI_Core_2
- 用Verilog HDL 语言编写的，可在FPGA上实现的SPI总线主端 收发读写模块 -SPI Master Read-Write controller core which was Writted by Verilog HDL based on fpga
USB3_a3p1000_9.1__
- 8bit10bit编解码、SPI解串、BAT656接受源码，并通过USB3.0 传送至PC机。经测试actel fpga 时钟频率100M可以满足320MB/s的传输速率-8bit10bit encoding and decoding, SPI solution string, BAT656 accept the source code, and through USB3.0 to PC. After testing the FPGA Actel clock frequency 100M can
Receiver
- FPGA SPI串行收发数据全双工程序开发，使用Verilog HDL开发语言-FPGA SPI serial port to send and receive data all double engineering sequence development, using Verilog HDL language development
USB-UART-SPI-I2C-IO-ADC-PWM
- uc/os operation system,which is used in FPGA nios ii.
SPI-slave-system
- FPGA时序逻辑设计：串行外围设备接口SPI从设备系统，包括串行时钟线SCK，主机输入/从机输出MISO，主机输出/从机输入MOSI和低电平有效的从机选择线SS。环境为Quartus。-FPGA Timing Logic Design: Serial Peripheral Interface SPI Slave Device System Includes Serial Clock Line SCK, Host Input/Slave Output MISO, Host Output/Slave
SPI
- 使用VHDL写的SPI Master模块(Using the SPI Master module written in VHDL)
spi_rdid
- FPGA 读取 N25Q128 SPI flash ID verilog程序(FPGA read spi flash n25q128 Read Identification)
题目一单片机部分
- 单片机与fpga通过spi协议实现通信-单片机部分(SCM and FPGA through SPI protocol communication - SCM)
spi
- 在FPGA上实现的SPi串口通信程序,经过实验验证可以正常工作(A serial communication program is used in FPGA.)
SPI协议的Verilog_实现
- spi串口原理介绍，并附有verilog编程代码，有助于在FPGA上实现。(The principle of SPI serial, and with a Verilog programming code, contribute to the implementation on FPGA.)
spi-fpga-master
- SPI Master code for use in fpga programming. the code model spi communication protocol.
spi
- 利用VHDL在FPGA内实现SPI总线的主从控制器设计(SPI Master and Slave Controller)
adc_interface-master
- ADC_Interface Simple SPI interface for AD7908/AD7918/AD7928 written in verilog HDL