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AD[TLC549]
- AD[TLC549] ：采集模拟输入，电压动态显示在数码管(用verilog实现)-AD [the TLC549]: the acquisition of the analog input voltage dynamic digital tube (Verilog)
ad
- ad采样程序，Verilog HDL，实测可用-ad sampling procedures, Verilog HDL, measured available
ADtlc549_ctl
- 用Verilog HDL设计的TLC549 AD转换控制模块 -Design using Verilog HDL the TLC549 AD conversion control module
verilog-AD-DA
- ad da 仿真 一个简单的verilog小程序 能模拟实现ad da 仿真-verilog program
AD_control
- 采用verilog语法实现对AD模块的控制-AD control based on verilog
adc_ctl
- AD采集芯片ADS8328的Verilog驱动代码，经过验证可用 -//Target IC: ADS8328(Read Frame Controlled via CS(FS=1) // IC Descr iption: Manual Channel Select, CLK Period = 10MHz(1MHz-21MHz), CS_n Low to DataVaild [3ns,15ns] // IC Time Sequence: da_tick = 50ns, da work p
AD7865
- verilog HDL语言编写的16位AD采样程序，包含源码和测试文件，已通过测试-verilog HDL language 16 AD sampling procedures, including source code and test files, has been tested
0404--AD16
- 16bits AD FPGA Verilog HDL -16bits AD FPGA Verilog HDL16bits AD FPGA Verilog HDL
i2c_lightsensor
- 用Verilog HDL编写的光敏传感器AD/DA程序，AD结果显示在LCD上，DA结果控制LED的亮度，相关软件：ISE Design suit，硬件：xilinx FPGA开发板-Verilog HDL prepared with light sensors AD/DA program, AD results are displayed on LCD, DA of controlling LED brightness, software: ISE Design suit, hardware:
AD_filter
- 一个最简单的verilog实现的ad采样数据滤波的算法。可以用来学习ad数据的滤波.-One of the simplest ad sampled data filtering algorithm verilog achieve. Learning can be used to filter data ad
DA_AD_v1.1B
- AD DA程序测试已经通过。12位分辨率 500KHz的AD和DA(Program test has passed by AD and DA with 12 bits resolution ratio in 500HZ frequency)
ad_prj1.4.3
- AD采集固定点数FPGA对采集数据进行指定次数累加，存储至片外SRAM并等待上位机发送取数据指令(The AD acquisition fixed point number FPGA adds the number of data to the collected data, stores it to the outside SRAM and waits for the upper computer to send the data instruction)
adc_interface-master
- ADC_Interface Simple SPI interface for AD7908/AD7918/AD7928 written in verilog HDL
AD多通道采集 FFT实验
- FFT核和AD多通道采集的Verilog HDL(Verilog HDL with FFT Core and AD Multichannel Acquisition)