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VHDL-ROM4.基于ROM的正弦波发生器的设计
- 基于ROM的正弦波发生器的设计：1.正弦发生器由波形数据存储模块（ROM），波形发生器控制模块及锁存模块组成 2.波形数据存储模块（ROM）定制数据宽度为8，地址宽度为6，可存储 64点正弦波形数据，用MATLAB求出波形数据。 3.将50MHz作为输入时钟。 ,ROM-based design of the sine wave generator: 1. Sinusoidal waveform generator by the data storage module (ROM), wav
xinhaofashengqi.rar
- 简易信号发生器，可产生正弦波、方波、三角波，幅度、频率都可调节。,Simple signal generator can produce sine, square, triangle wave, amplitude, frequency adjustment can be.
pn_generator.rar
- FPGA实现pn发生器，Verilog代码实现，另带modlesim的仿真测试文件，很有价值。,FPGA realization of pn generator, Verilog code, and the other with the simulation test modlesim documents of great value.
wave.rar
- 波形发生器，Visual C++ 6.0、DDK和keil C51 uVision2 开发，含usb驱动,Waveform Generator, Visual C++ 6.0, DDK and keil C51 uVision2 development, with usb drive
using CM8880 generator and recognition phone pulses
- This source code is for using CM8880 generator and recognition phone pulses and calling algoritm for pic 16f877,This source code is for using CM8880 generator and recognition phone pulses and calling algoritm for pic 16f877
MATLAB_sg_IP.rar
- 使用MATLAB为System Generator for DSP创建IP,The use of MATLAB for System Generator for DSP to create IP
wave
- 单片机89s51做的波形发生器，含PROTEUS仿真图，非常实用的波形产生源码！-89s51 do single-chip waveform generator, including PROTEUS simulation map, very useful source of the waveform generator!
sanjiaobo
- 幅值，频率可调的三角波发生器S-函数的实现-Amplitude, frequency adjustable triangular-wave generator to achieve S-function
sine-generator
- 原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成，可产生正弦波。更改rom内容可改变波形-Original: Using VHDL languages sinusoidal signal generator. rom using Quartus LPM s own generation, can produce sine wave. Rom content changes can change the waveform
FPGA_Clk
- 基于Cyclone EP1C6240C8 FPGA的时钟产生模块。主要用于为FPGA系统其他模块产生时钟信号。采用verilog编写。 使用计时器的方式产生时钟波形。 提供对于FPGA时钟的偶数分频、奇数分频、始终脉冲宽度等功能。-Based on Cyclone EP1C6240C8 FPGA' s clock generator module. Is mainly used for the FPGA system clock signal generated in other
FINALWORK
- 简易信号发生器 可产生正弦波、方波、三角波、锯齿波 周期可调 verilog-Simple signal generator can produce sine, square, triangle wave, sawtooth-cycle adjustable verilog
LCD_font_gen
- 2款LCD字库生成器，超级好用，可以用于单片机及各种处理使用LCD编程的情况。-2 LCD font generator, super easy to use, can be used for single chip and LCD programming using various processing conditions.
wave
- 可控脉冲发生器的VHDL源代码。设计文件加载到目标器件后，按下按键开关模块的S8按键，在输出观测模块通过示波器可能观测到一个频率约为1KHZ、占空比为50 的矩形波。按下S1键或者S2键，这个矩形波的频率会发生相应的增加或者减少。按下S3键或者S4键，这个矩形波的占空比会相应的增加或减少。-Controllable pulse generator of the VHDL source code. Design documents loaded to the target device and p
pn127
- 这是个128位的串行伪随机码发生器，还可以进一步扩充-128 This is a serial pseudo-random code generator, can be further expanded
generator
- 正弦波(三角波）发生器程序，可产生三角波，很实用-Sine wave (triangular wave) generator
Cascade-brushless-doubly-fed-generator-simulation.
- 级联式无刷双馈发电机的仿真研究Cascade brushless doubly-fed generator simulation-Cascade brushless doubly-fed generator simulation
AVR-Frequency-Generator
- 用ATMEGA8做的简易频率发生器。采用timer1的比较匹配功能产生方波，数码管显示。Proteus仿真。-Easy to do with ATMEGA8 frequency generator. Timer1 compare match function by generating a square wave, digital display. Proteus simulation.
signal-generator
- 基于VHDL的函数信号发生器【正弦波、三角波、锯齿波、方波】-signal generator【VHDL】
signal-generator-
- 自己做的基于proteus仿真的信号发生器设计，51单片机-Oneself do proteus simulation based on the signal generator design
White noise generator
- White noise generator using sum of single tones