搜索资源列表
mydesign.rar
- 基于FPGA的直接序列扩频发射机的设计与仿真。实验中以QuartusII 7.2 为设计和仿真工具， 各模块采用Verilog HDL设计并封装，顶层使用图形设计方式,最后得到的仿真结果使用Matlab描点来绘制出波形。 ,FPGA-based direct sequence spread spectrum transmitter of the design and simulation. Experiment to QuartusII 7.2 for the design and simu
baseband_verilog.rar
- verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器,verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum m
SDR
- 直接序列扩频通信的Verilog仿真代码，在Quartus II中实现。-Direct sequence spread spectrum communication Verilog simulation code, implemented in Quartus II.
VHDL_DMF
- Vhdl实现扩频通信匹配滤波器，书上打下来的,打了好久.-VHDL realization of spread spectrum communication matched filter, books, playing down, playing for a long time.
fft
- 用VERILOG语言实现的频谱分析仪（FFT)-VERILOG language with the Spectrum Analyzer (FFT)
MATLAB-and-verilog
- 1 采用正弦波，方波进行同步调制，实现调制信号、已调信号、解调信号的波形、频谱以及解调器输入输出信噪比的关系。 2 采用Verilog语言编写有符号的五位乘法器 3 实现数字与模拟调制-A sine wave, square wave synchronous modulation to achieve the modulation signal, the modulated signal, the demodulated signal waveform, spectrum and sig
Sender
- 直序扩频通信发送部分的源代码，用verilog编的，包括信源模块、扩频模块、极性变换模块和DDS调制模块-Direct sequence spread spectrum communication sent part of the source code, compiled with verilog source modules, spread spectrum modules, polarity transform module and DDS modulation module
QPSK_DSSS
- 该程序使用verilog语言，编写了QPSK-DSSS系统的发端，主要模块包括对同相分量和正交分量的扩频，通过根升余弦滤波器，以及与载波相乘等模块。-The program uses the verilog language, written QPSK-DSSS system, the originator, the main modules include in-phase and quadrature components of the spectrum, through the root
audio_fft_vga
- 代码使用Verilog HDL实现了使用WM8731对音频进行采样，并且使用ALTERA FPGA实现了频谱计算（FFT），在VGA上显示频谱。-Achieved using the Verilog HDL code using WM8731 audio sampling, and use ALTERA FPGA to achieve the calculated spectrum (FFT), shows the spectrum on VGA.
Spread-Spectrum-Analyzer
- Spread-Spectrum-Analyzer in verilog with testbench
扩频通信的Verilog工程
- 扩频通信的Verilog工程，对从事无线通信的工程人员有参考作用。(Spread spectrum communication Verilog project, engaged in wireless communications engineering staff reference.)
Nexys4FFTDemo-master
- A simple Verilog example of a 4096pt FFT on analog input from a Nexys 4 XADC. The input is sampled at 1MSPS, oversampled to produce 14-bit samples at 62.5kHz, then sent to the FFT processing modules and passed through to PWM Audio out. The FFT output
signal
- 简易频谱仪 256位 采用了直接数字频率合成技术(DDS)和计算机控制技术，选择美国Analog Devices公司的高度集成DDS芯片AD9851和AT89S52单片机作为控制器件，设计了一种基于DDS的程控信号发生器。用C语言进行了软件应用设计。实验结果表明，该信号发生器能较好地产生较高稳定度的激励信号，具有较高的实用价值。(Simple spectrum meter 256 bit)