搜索资源列表
pn127
- 这是个128位的串行伪随机码发生器，还可以进一步扩充-128 This is a serial pseudo-random code generator, can be further expanded
barcode-generator
- 条码生成器。条码编译码程序，希望能给大家带来帮助。-Bar code encode-decode
LFSR
- verilog实现的8阶伪随机序列发生器，文件包含了三种主要模块：控制模块，ROM模块，线性反馈移位寄存器（LFSR）模块。已经通过modelsim仿真验证。-verilog to achieve 8-order pseudo-random sequence generator, the file contains three main modules: control module, ROM modules, a linear feedback shift register (LFSR) mo
PrimeGenAndTester
- Very large (tested for more than 2048 bits) prime number generator and tester program. This is well written and based on solid algorithms in this field. Source code is my own, used for Masters course in Cryptography. Program has easily readable and
(PWM)
- 方波发生器程序。AVR单片机程序。MEGA16-Square-wave generator procedures. AVR Singlechip procedures. MEGA16
Gold_Sequence_Generator
- 美国国家航空和宇宙航空局(NASA)研制的跟踪和数据中继卫星系统(TDRSS)的正交信号发生器使用的是阶数为r=11的GOLD序列，序列长为2047，m序列优选对为4445和4005，利用Matlab程序构造出这个序列，并且验证信号的平衡标准，PACF(离散周期自相关函数)和PCCF(离散周期互相关函数)。通过Matlab2009A测试。-NASA developed tracking and data relay satellite system (TDRSS) use of orthogon
assoc.gen
- IBM Quest Market-Basket Synthetic Data Generator是做关联规则挖掘多用的一种人工数据合成工具，这方面论文的实验数据大多是用它生成的数据。-IBM Quest Market-Basket Synthetic Data Generator for mining association rules is to do a manual multi-purpose data integration tools, this paper experimental
rpg
- 一个随机密码产生器代码-A random password generator code
cmdsrc
- random.zip 随机数产生器的汇编源代码 cmdsrc.zip 一个文本编辑器的汇编源代码-random.zip random number generator to compile the source code of a text editor cmdsrc.zip compilation of source code
Npc Generator - Source Code
- Npc Generator
JLex
- JLex词法分析生成器，可以用于生成简单词法分析器，java编写-JLex lexical analysis generator can be used to produce simple lexical analyzer, the preparation of java
convolutional_encode
- simulating a convolutional encoder allows the user to input a source code to be encoded and also input the values of the generator polynomials. It outputs the encoded data bits, where 1/n is the code rate
Rayleigh_Fading_Channel_Signal_Generator
- Rayleigh Fading Channel Signal Generator
rng_opencore
- opencore, random number generator, verilog
VGADIY
- 自己编的VGA彩条信号发生器verilog ise环境-Own the VGA color signal generator verilog ise Environment
LFSR
- 伪随机序列产生器,线性反馈移位寄存器，原代码。-Pseudo-random sequence generator, linear feedback shift register, the original code.
fcsr
- 伪随机序列产生器－代进位反馈移位寄存器，verilog hdl 原代码。-Pseudo-random sequence generator- on behalf of binary feedback shift register, verilog hdl original code.
ffcsr
- 伪随机序列产生器－filtered 代进位反馈移位寄存器，verilog hdl 原代码。-Pseudo-random sequence generator-filtered on behalf of binary feedback shift register, verilog hdl original code.
dfi
- 感应双馈发电机系统的仿真,已经完美封装好,参数可自行更改.-Doubly-fed induction generator system simulation, has the perfect package, and can make changes to parameters.
DDS
- 基于DDS技术的函数波形发生器设计，适合用fpga设计波形发生器用-Based on DDS technology function waveform generator design, suitable for FPGA design with Waveform Generator