搜索资源列表
counterfour
- verilog code for counter four
counter
- 关于FPGA实现的几种计数器的verilog源程序-FPGA implementation of several counter verilog source code
UpDownCounter
- 8-Bit Up Down Counter Verilog Code
counter2
- 计数器Verilog源程序，可轻易实现数目的计算，包含源程序及实现方法。-Counter Verilog source code, the number of calculations can be easily achieved, including source code, and Realization.
count
- 一种计数器的FPGA的verilog源程序和仿真图谱-A kind of counter verilog source code and simulation of FPGA-map
mod10asynchro
- this is a verilog code for asynchronous mod-10 counter.its also called a decade counter.
LIP1701CORE_system_watchdog
- System watchdog verilog code
counter_net
- counter verilog code
time-counter
- 基于verilog的计时器源代码，可以通过编译-Verilog source code based on the timer, you can compile
Counter.v
- Custom verilog code for up counter with Interrupt.
Variable-mode--counter
- 这是可变模加减计数器的Verilog源程序，已经编译通过，可以使用-This is the variable mode subtraction counter Verilog source code, has been compiled by, you can use
verilog.tar
- counter.v...its verilog code for counter
Counter
- 用VERILOG语言实现的74*163 计数器，代码十分简单易懂，适合数字逻辑电路实验的初学者-With the VERILOG language implementation of the 74* 163 counter, the code is very simple and easy to understand, suitable for digital logic circuit experiment for beginners
fifo-code
- Verilog代码：同步\异步FIFO。包含格雷码计数器.-Verilog code: syncronous\asyncourous FIFO. containing gray counter.
Johnson-counter-with-verilog-design
- the file contains verilog code for johnson counter
Mod13-counter-with-verilog-design
- verilog code for mod13 counter source code-verilog code for mod13 counter source code
ringcounter-with-verilog-design
- Ring counter souce code in verilog
counter
- 计数器实现的verilog代码，基础的实用，大家多多支持-Counter verilog code to achieve, based on practical, we can support
Gray Counter
- Gray counter verilog code
bcd counter
- Binary counter design in verilog