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CPU_Architecture
- Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks. External hardware accelerator is used for network packet processing. The common netw
8BitRISC_CPU(VERILOG)
- 8位risc内核源代码，内有体统框图，较其他详细。适合初学者学习-8-bit risc kernel source code, there are decency diagram, compared with other details. Suitable for beginners to learn
cpudesign
- Risc 32位CPU设计方法，由牛人主讲，可以好好学习-Risc 32 Wei CPU design methodology, from the cattle were speakers, you can learn
Guide-to-RISC-Processors-For-Programmers-and-Engi
- Sivarama P. Dandamudi Guide to RISC Processors for Programmers and Engineers
MANIK
- MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed below. Features Hardware Features • Data Path Width 32 bits, with Four stage pipeline. • Mixed 16/32 bit instructions for code density ̶
8bit_RISC_CPU_RTL_Code
- 8位RISC CPU 内核源码(VERILOG版)-8 bit RSIC CPU RTL code(Verilog)
RISC32bitwithVHDL
- 一个VHDL写的32位RISC程序，比较适合作为修改指令用。-32bit RISC design with VHDL language.
mipscpu-source
- mips cpu的实现.MIPS是世界上很流行的一种RISC处理器。MIPS公司的R系列就是在此基础上开发的RISC工业产品的微处理器。这些系列产品为很多计算机公司采用构成各种工作站和计算 机系统。 -mips cpu implementation. MIPS is the world' s very popular as a RISC processor. MIPS company' s R series is based on the development of industr
risc1200
- risc cpu设计源码，全部资料 欢迎下载-risc cpu core
alu
- this is source code in verilog for arithmatic logic unit for RISC cpu
RISCcpu
- this verilog model of RISC CPU-this is verilog model of RISC CPU
risc_cup
- 精简指令集CPU的VERILOG语言实现，很有用-RISC CPU the VERILOG language, very useful
RISCMCU_Thesis
- thesis of risc processor
32-RISC
- 32位RI SC微处理器中分支预测器的硬件实现 关键词：分支预测；超标量；分支历史-Hardware implementation of branch predictor in 32 bit RISC microprocessor
zxcpu
- 用VHDL语言设计了一个含10条指令的RISC处理器。假定主存可以在一个始终周期内完成依次读写操作且和CPU同步，系统使用一个主存单元。处理器指令字长16位，包含8个通用寄存器，1个16位的指令寄存器和一个16位的程序记数器。处理器的地址总线宽度16位。数据总线宽度16位，取指和数据访问均在一跳蝻数据总线。处理器支持包含LDA，STA，MOV，MVI，ADD，SUB，AND，OR，JZ，JMP十条指令。其中仅有LDA和STA是访存指令。-VHDL language design with a R
A-RISC-Design
- RISC设计：MIPS指令集控制器核，详细介绍一款32位risc-cpu。-A RISC Design:Synthesis of the MIPS Processor Core
btcx-risc
- bt848/bt878/cx2388x risc code generator under linux 2.6.3x kernel.
32-bit-RISC-CPU-ARM
- 32位RISC CPU ARM芯片的应用和选型-32-bit RISC CPU ARM chip application and selection
RISC_cpu
- 基于RISC结构的8位微处理器的verilog源代码，很好的东西。-8-bit RISC-based microprocessor architecture verilog source code, a good thing.
Springer.Guide-to-RISC-Processors--for-Programmer
- Springer.Guide to RISC Processors - for Programmers and Engineers